GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/guybrush: Add a mainboard specific SPL table 

Chromebook needs to do some additional check, which is not
available in the AMD's PI released SPL table.

BUG=b:216096562

Change-Id: Ib8074641b9fc9b38239a6e3837b8569e14af3342
Signed-off-by: Zheng Bao <fishbaozi@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Zheng Bao 2022-02-15 00:38:54 +08:00 committed by Felix Held
parent 6c5efcd268
commit b09166d0e6
1 changed files with 9 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/mainboard/google/guybrush/Kconfig
View File

@ -99,6 +99,15 @@ config AMDFW_CONFIG_FILE
string string
default "src/mainboard/google/guybrush/variants/baseboard/amdfw.cfg" default "src/mainboard/google/guybrush/variants/baseboard/amdfw.cfg"
config HAVE_SPL_FILE
bool
default y
config SPL_TABLE_FILE
string
depends on HAVE_SPL_FILE
default "3rdparty/blobs/mainboard/google/guybrush/TypeId0x55_SplTable_Prod_CZN_Chrome.sbin"
if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig
config EFS_SPI_READ_MODE config EFS_SPI_READ_MODE
default 4 # Dual IO (1-2-2) default 4 # Dual IO (1-2-2)