drivers/intel/gma/acpi: Provide default definition for displays

Use it wherever the standard numbers were copied to. Bit 31 is set
at runtime unconditionally, so we don't need it here.

Change-Id: I0d853c3b8250a2c7b2d1a91985a555e4b17ad76c
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39731
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber 2020-03-21 20:35:12 +01:00
parent 9af0b15e95
commit b0b25c8e9c
42 changed files with 47 additions and 106 deletions

View File

@ -92,6 +92,11 @@ struct i915_gpu_controller_info
u32 did[5];
};
#define GMA_STATIC_DISPLAYS(ssc) { \
.use_spread_spectrum_clock = (ssc), \
.ndid = 3, .did = { 0x0100, 0x0240, 0x0410, } \
}
void
drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *conf);
const struct i915_gpu_controller_info *

View File

@ -15,8 +15,7 @@
chip northbridge/intel/i945
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_hotplug" = "0x00000220"
register "gpu_lvds_use_spread_spectrum_clock" = "1"

View File

@ -10,9 +10,8 @@
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
chip northbridge/intel/sandybridge # FIXME: check gfx.ndid and gfx.did
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx.ndid" = "3"
chip northbridge/intel/sandybridge # FIXME: check gfx
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"
register "gpu_dp_d_hotplug" = "4"

View File

@ -25,12 +25,7 @@ static const unsigned char qemu_q35_irqs[] = {
10, 10, 11, 11,
};
struct i915_gpu_controller_info gfx_controller_info = {
.ndid = 3,
.did = {
0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005
}
};
struct i915_gpu_controller_info gfx_controller_info = GMA_STATIC_DISPLAYS(0);
const struct i915_gpu_controller_info *
intel_gma_get_controller_info(void)

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort B Hotplug with 6ms pulse
register "gpu_dp_b_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/haswell
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/haswell
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/haswell
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/haswell
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable eDP Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -15,7 +14,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_backlight_off_delay" = "2100" # TD: 210ms
# For native gfx
register "gfx.use_spread_spectrum_clock" = "0"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/i945
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
device cpu_cluster 0 on
chip cpu/intel/socket_m

View File

@ -1,7 +1,6 @@
chip northbridge/intel/haswell
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/i945
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
device cpu_cluster 0 on
chip cpu/intel/socket_m

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
device cpu_cluster 0 on
chip cpu/intel/model_206ax

View File

@ -1,7 +1,5 @@
chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "0"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_cpu_backlight" = "0x00000000"
register "gpu_dp_b_hotplug" = "0"
register "gpu_dp_c_hotplug" = "0"

View File

@ -1,7 +1,5 @@
chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
register "gpu_cpu_backlight" = "0x00000060"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"

View File

@ -1,14 +1,12 @@
chip northbridge/intel/gm45
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
register "gpu_panel_power_up_delay" = "250" # T1+T2: 25ms
register "gpu_panel_power_down_delay" = "250" # T3: 25ms
register "gpu_panel_power_backlight_on_delay" = "2500" # T5: 250ms
register "gpu_panel_power_backlight_off_delay" = "2500" # Tx: 250ms
register "gpu_panel_power_cycle_delay" = "3" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
device cpu_cluster 0 on
chip cpu/intel/socket_p

View File

@ -15,8 +15,7 @@
chip northbridge/intel/ironlake
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -30,7 +29,6 @@ chip northbridge/intel/ironlake
register "gpu_panel_power_backlight_off_delay" = "0"
register "gpu_cpu_backlight" = "0x58d"
register "gpu_pch_backlight" = "0x061a061a"
register "gfx.use_spread_spectrum_clock" = "1"
device cpu_cluster 0 on
chip cpu/intel/model_2065x

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -13,7 +12,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"

View File

@ -1,6 +1,5 @@
chip northbridge/intel/sandybridge
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -12,7 +11,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"

View File

@ -1,6 +1,5 @@
chip northbridge/intel/sandybridge
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -12,7 +11,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"

View File

@ -1,6 +1,5 @@
chip northbridge/intel/sandybridge
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -12,7 +11,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"

View File

@ -1,6 +1,5 @@
chip northbridge/intel/haswell
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx.ndid" = "3"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_ddi_e_connected" = "1"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -13,7 +12,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -13,7 +12,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -13,7 +12,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"

View File

@ -15,8 +15,7 @@
chip northbridge/intel/i945
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_hotplug" = "0x00000220"
register "gpu_lvds_use_spread_spectrum_clock" = "1"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
register "gpu_dp_d_hotplug" = "0x04"
@ -12,7 +11,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "100"
register "gpu_panel_power_backlight_on_delay" = "3000"
register "gpu_panel_power_backlight_off_delay" = "2000"
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"

View File

@ -1,7 +1,5 @@
chip northbridge/intel/sandybridge
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx.ndid" = "3"
register "gfx.use_spread_spectrum_clock" = "1"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
register "gpu_cpu_backlight" = "0x00001155"
register "gpu_dp_b_hotplug" = "4"
register "gpu_dp_c_hotplug" = "4"

View File

@ -1,14 +1,12 @@
chip northbridge/intel/gm45
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
register "gpu_panel_power_up_delay" = "250" # T1+T2: 25ms
register "gpu_panel_power_down_delay" = "250" # T3: 25ms
register "gpu_panel_power_backlight_on_delay" = "2500" # T5: 250ms
register "gpu_panel_power_backlight_off_delay" = "2500" # Tx: 250ms
register "gpu_panel_power_cycle_delay" = "3" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
device cpu_cluster 0 on
chip cpu/intel/socket_BGA956

View File

@ -15,8 +15,7 @@
chip northbridge/intel/ironlake
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
@ -31,7 +30,6 @@ chip northbridge/intel/ironlake
register "gpu_panel_power_backlight_off_delay" = "2500"
register "gpu_cpu_backlight" = "0x58d"
register "gpu_pch_backlight" = "0x061a061a"
register "gfx.use_spread_spectrum_clock" = "1"
device cpu_cluster 0 on
chip cpu/intel/model_2065x

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -13,7 +12,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "300" # T5+T6: 30ms
register "gpu_panel_power_backlight_on_delay" = "2000" # T3: 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # T4: 200ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x06100610"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(1)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"
@ -13,7 +12,6 @@ chip northbridge/intel/sandybridge
register "gpu_panel_power_down_delay" = "100" # T5+T6: 10ms
register "gpu_panel_power_backlight_on_delay" = "2100" # T3: 210ms
register "gpu_panel_power_backlight_off_delay" = "2100" # T4: 210ms
register "gfx.use_spread_spectrum_clock" = "1"
register "gpu_cpu_backlight" = "0x1155"
register "gpu_pch_backlight" = "0x11551155"

View File

@ -15,8 +15,7 @@
chip northbridge/intel/i945
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_hotplug" = "0x00000220"
register "gpu_lvds_use_spread_spectrum_clock" = "1"

View File

@ -15,8 +15,7 @@
chip northbridge/intel/ironlake
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_dp_b_hotplug" = "0x04"
register "gpu_dp_c_hotplug" = "0x04"
@ -31,7 +30,6 @@ chip northbridge/intel/ironlake
register "gpu_panel_power_backlight_off_delay" = "3000"
register "gpu_cpu_backlight" = "0x58d"
register "gpu_pch_backlight" = "0x061a061a"
register "gfx.use_spread_spectrum_clock" = "0"
device cpu_cluster 0 on
chip cpu/intel/model_2065x

View File

@ -15,8 +15,7 @@
chip northbridge/intel/i945
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
device cpu_cluster 0 on
chip cpu/intel/socket_m

View File

@ -1,7 +1,6 @@
chip northbridge/intel/gm45
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
device cpu_cluster 0 on
chip cpu/intel/socket_BGA956
device lapic 0 on end

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"

View File

@ -1,7 +1,6 @@
chip northbridge/intel/sandybridge
# IGD Displays
register "gfx.ndid" = "3"
register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410, 0x80000410, 0x00000005 }"
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Enable DisplayPort 1 Hotplug with 6ms pulse
register "gpu_dp_d_hotplug" = "0x06"