mb/google/dedede: Support integratred BT enumeration

The integrated BT is routed via USB2 port 8, add USB configuration
to support integrated BT enumeration.

Change-Id: I46d8c92ba57cd72a91ee15ef4d11f07824c29e9a
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39471
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
This commit is contained in:
Aamir Bohra 2020-03-12 21:37:25 +05:30 committed by Patrick Georgi
parent 223a30ce11
commit b0b3219666
1 changed files with 9 additions and 3 deletions

View File

@ -31,10 +31,10 @@ chip soc/intel/tigerlake
register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # Type-C Port C1
register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A0
register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Type-A Port A1
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth
register "usb2_ports[4]" = "USB2_PORT_MID(OC_SKIP)" # Discrete Bluetooth
register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Not Used
register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Not Used
register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Not Used
register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Integrated Bluetooth
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type-C Port C0
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/2 Type-C Port C1
@ -190,11 +190,17 @@ chip soc/intel/tigerlake
device usb 2.3 on end
end
chip drivers/usb/acpi
register "desc" = ""Bluetooth""
register "desc" = ""Discrete Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H19)"
device usb 2.4 on end
end
chip drivers/usb/acpi
register "desc" = ""Integrated Bluetooth""
register "type" = "UPC_TYPE_INTERNAL"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H19)"
device usb 2.7 on end
end
chip drivers/usb/acpi
register "desc" = ""Left Type-C Port""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"