soc/amd: Refactor ACPI power state and ELOG
Change-Id: Ib7423c8d80355871393c377ebaffdfe2846d8852 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49836 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -4,6 +4,7 @@
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#include <amdblocks/acpi.h>
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#include <acpi/acpi.h>
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#include <acpi/acpi_gnvs.h>
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#include <acpi/acpi_pm.h>
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#include <bootmode.h>
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#include <console/console.h>
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#include <elog.h>
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@ -106,8 +107,15 @@ void acpi_fill_pm_gpe_state(struct acpi_pm_gpe_state *state)
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state->aligning_field = 0;
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}
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void acpi_pm_gpe_add_events_print_events(const struct acpi_pm_gpe_state *state)
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void acpi_pm_gpe_add_events_print_events(void)
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{
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const struct chipset_power_state *ps;
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const struct acpi_pm_gpe_state *state;
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if (acpi_pm_state_for_elog(&ps) < 0)
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return;
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state = &ps->gpe_state;
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log_pm1_status(state->pm1_sts);
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print_pm1_status(state->pm1_sts);
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log_gpe_events(state);
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@ -1,10 +1,12 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi_pm.h>
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#include <device/mmio.h>
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#include <device/device.h>
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#include <console/console.h>
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#include <elog.h>
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#include <gpio.h>
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#include <amdblocks/acpi.h>
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#include <amdblocks/acpimmio.h>
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#include <amdblocks/gpio_banks.h>
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#include <amdblocks/smi.h>
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@ -363,11 +365,17 @@ void gpio_fill_wake_state(struct gpio_wake_state *state)
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check_gpios(state->wake_stat[1], 14, 128, state);
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}
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void gpio_add_events(const struct gpio_wake_state *state)
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void gpio_add_events(void)
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{
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const struct chipset_power_state *ps;
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const struct gpio_wake_state *state;
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int i;
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int end;
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if (acpi_pm_state_for_elog(&ps) < 0)
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return;
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state = &ps->gpio_state;
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end = MIN(state->num_valid_wake_gpios, ARRAY_SIZE(state->wake_gpios));
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for (i = 0; i < end; i++)
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elog_add_event_wake(ELOG_WAKE_SOURCE_GPIO, state->wake_gpios[i]);
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@ -4,6 +4,7 @@
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#define AMD_BLOCK_ACPI_H
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#include <types.h>
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#include <amdblocks/gpio_banks.h>
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/* ACPI MMIO registers 0xfed80800 */
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#define MMIO_ACPI_PM1_STS 0x00
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@ -29,7 +30,7 @@ struct acpi_pm_gpe_state {
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/* Fill object with the ACPI PM and GPE state. */
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void acpi_fill_pm_gpe_state(struct acpi_pm_gpe_state *state);
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/* Save events to eventlog log and also print information on console. */
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void acpi_pm_gpe_add_events_print_events(const struct acpi_pm_gpe_state *state);
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void acpi_pm_gpe_add_events_print_events(void);
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/* Clear PM and GPE status registers. */
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void acpi_clear_pm_gpe_status(void);
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@ -41,4 +42,9 @@ void set_pm1cnt_s5(void);
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void acpi_enable_sci(void);
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void acpi_disable_sci(void);
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struct chipset_power_state {
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struct acpi_pm_gpe_state gpe_state;
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struct gpio_wake_state gpio_state;
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};
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#endif /* AMD_BLOCK_ACPI_H */
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@ -30,7 +30,7 @@ struct gpio_wake_state {
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/* Fill gpio_wake_state object for future event reporting. */
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void gpio_fill_wake_state(struct gpio_wake_state *state);
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/* Add gpio events to the eventlog. */
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void gpio_add_events(const struct gpio_wake_state *state);
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void gpio_add_events(void);
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enum {
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GEVENT_0,
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@ -205,16 +205,12 @@ static void gpp_clk_setup(void)
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void southbridge_init(void *chip_info)
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{
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struct chipset_power_state *state;
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i2c_soc_init();
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sb_init_acpi_ports();
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state = acpi_get_pm_state();
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if (state) {
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acpi_pm_gpe_add_events_print_events(&state->gpe_state);
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gpio_add_events(&state->gpio_state);
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}
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acpi_pm_gpe_add_events_print_events();
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gpio_add_events();
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acpi_clear_pm_gpe_status();
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al2ahb_clock_gate();
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@ -5,7 +5,6 @@
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#include <acpi/acpi.h>
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#include <amdblocks/acpi.h>
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#include <amdblocks/gpio_banks.h>
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#include <device/device.h>
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#include <stdint.h>
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@ -17,10 +16,4 @@ uintptr_t agesa_write_acpi_tables(const struct device *device, uintptr_t current
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const char *soc_acpi_name(const struct device *dev);
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/* Object to capture state of chipset for logging events. */
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struct chipset_power_state {
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struct acpi_pm_gpe_state gpe_state;
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struct gpio_wake_state gpio_state;
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};
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#endif /* AMD_PICASSO_ACPI_H */
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@ -17,8 +17,4 @@ unsigned long southbridge_write_acpi_tables(const struct device *device,
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const char *soc_acpi_name(const struct device *dev);
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struct chipset_power_state {
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struct acpi_pm_gpe_state gpe_state;
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};
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#endif /* AMD_STONEYRIDGE_ACPI_H */
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@ -411,7 +411,7 @@ void southbridge_init(void *chip_info)
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state = cbmem_add(CBMEM_ID_POWER_STATE, sizeof(*state));
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if (state) {
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acpi_fill_pm_gpe_state(&state->gpe_state);
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acpi_pm_gpe_add_events_print_events(&state->gpe_state);
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acpi_pm_gpe_add_events_print_events();
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}
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acpi_clear_pm_gpe_status();
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