I82801JX: Add IS_ENABLED around config options
This chipset was just added and had a few places that needed to be fixed. Change-Id: Ief048c4876c5a2cb538c9cb4b295aba46a4fff62 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20684 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
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@ -29,7 +29,7 @@
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#include "../../../soc/intel/sch/sch.h"
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#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801IX)
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#include "../../../southbridge/intel/i82801ix/i82801ix.h"
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#elif CONFIG_SOUTHBRIDGE_INTEL_I82801JX
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#elif IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801JX)
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#include "../../../southbridge/intel/i82801jx/i82801jx.h"
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#else
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@ -15,7 +15,7 @@
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*/
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Name(\_S0, Package(){0x0,0x0,0x0,0x0})
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#if !CONFIG_HAVE_ACPI_RESUME
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#if !IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
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Name(\_S1, Package(){0x1,0x0,0x0,0x0})
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#else
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Name(\_S3, Package(){0x5,0x0,0x0,0x0})
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@ -222,7 +222,7 @@ static void i82801jx_init(void *chip_info)
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i82801jx_hide_functions();
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/* Reset watchdog timer. */
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#if !CONFIG_HAVE_SMI_HANDLER
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#if !IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
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outw(0x0008, DEFAULT_TCOBASE + 0x12); /* Set higher timer value. */
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#endif
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outw(0x0000, DEFAULT_TCOBASE + 0x00); /* Update timer. */
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@ -369,7 +369,7 @@ static void enable_clock_gating(void)
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RCBA32(0x38c0) |= 7;
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}
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#if CONFIG_HAVE_SMI_HANDLER
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#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
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static void i82801jx_lock_smm(struct device *dev)
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{
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#if TEST_SMM_FLASH_LOCKDOWN
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@ -464,7 +464,7 @@ static void lpc_init(struct device *dev)
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/* Interrupt 9 should be level triggered (SCI) */
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i8259_configure_irq_trigger(9, 1);
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#if CONFIG_HAVE_SMI_HANDLER
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#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
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i82801jx_lock_smm(dev);
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#endif
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}
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