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northbridge/intel/nehalem: Fix native VGA init 

Building an image for the Lenovo X201 with native graphics
initialization selected fails due to the changes introduced by commit
a3b898aa (edid: Clean-up the edid struct).
Same as in 11738 / 11585 / 11491

Change-Id: I4233a4ce2f5423c7ebdad68e8059cd34ac61cfaa
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/11787
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Nicolas Reinecke 2015-10-03 17:32:38 +02:00 committed by Alexandru Gagniuc
parent 715a18e451
commit b142b84afb
1 changed files with 16 additions and 14 deletions
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30
src/northbridge/intel/nehalem/gma.c
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@ -644,6 +644,7 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
int i; int i;
u8 edid_data[128]; u8 edid_data[128];
struct edid edid; struct edid edid;
struct edid_mode *mode;
u32 hactive, vactive, right_border, bottom_border; u32 hactive, vactive, right_border, bottom_border;
int hpolarity, vpolarity; int hpolarity, vpolarity;
u32 vsync, hsync, vblank, hblank, hfront_porch, vfront_porch; u32 vsync, hsync, vblank, hblank, hfront_porch, vfront_porch;
@ -703,25 +704,26 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
intel_gmbus_stop(mmio + PCH_GMBUS0); intel_gmbus_stop(mmio + PCH_GMBUS0);
decode_edid(edid_data, decode_edid(edid_data,
sizeof(edid_data), &edid); sizeof(edid_data), &edid);
mode = &edid.mode;
/* Disable screen memory to prevent garbage from appearing. */ /* Disable screen memory to prevent garbage from appearing. */
vga_sr_write(1, vga_sr_read(1) | 0x20); vga_sr_write(1, vga_sr_read(1) | 0x20);
hactive = edid.x_resolution; hactive = edid.x_resolution;
vactive = edid.y_resolution; vactive = edid.y_resolution;
right_border = edid.hborder; right_border = mode->hborder;
bottom_border = edid.vborder; bottom_border = mode->vborder;
hpolarity = (edid.phsync == '-'); hpolarity = (mode->phsync == '-');
vpolarity = (edid.pvsync == '-'); vpolarity = (mode->pvsync == '-');
vsync = edid.vspw; vsync = mode->vspw;
hsync = edid.hspw; hsync = mode->hspw;
vblank = edid.vbl; vblank = mode->vbl;
hblank = edid.hbl; hblank = mode->hbl;
hfront_porch = edid.hso; hfront_porch = mode->hso;
vfront_porch = edid.vso; vfront_porch = mode->vso;
target_frequency = info->gfx.lvds_dual_channel ? edid.pixel_clock target_frequency = info->gfx.lvds_dual_channel ? mode->pixel_clock
: (2 * edid.pixel_clock); : (2 * mode->pixel_clock);
vga_textmode_init(); vga_textmode_init();
#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE) #if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
vga_sr_write(1, 1); vga_sr_write(1, 1);
@ -788,8 +790,8 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
return; return;
} }
link_m1 = ((uint64_t)link_n1 * edid.pixel_clock) / link_frequency; link_m1 = ((uint64_t)link_n1 * mode->pixel_clock) / link_frequency;
data_m1 = ((uint64_t)data_n1 * 18 * edid.pixel_clock) data_m1 = ((uint64_t)data_n1 * 18 * mode->pixel_clock)
/ (link_frequency * 8 * (info->gfx.lvds_num_lanes ? : 4)); / (link_frequency * 8 * (info->gfx.lvds_num_lanes ? : 4));
printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n", printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n",