northbridge/intel/nehalem: Fix native VGA init
Building an image for the Lenovo X201 with native graphics
initialization selected fails due to the changes introduced by commit
a3b898aa
(edid: Clean-up the edid struct).
Same as in 11738 / 11585 / 11491
Change-Id: I4233a4ce2f5423c7ebdad68e8059cd34ac61cfaa
Signed-off-by: Nicolas Reinecke <nr@das-labor.org>
Reviewed-on: http://review.coreboot.org/11787
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
parent
715a18e451
commit
b142b84afb
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@ -644,6 +644,7 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
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int i;
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u8 edid_data[128];
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struct edid edid;
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struct edid_mode *mode;
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u32 hactive, vactive, right_border, bottom_border;
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int hpolarity, vpolarity;
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u32 vsync, hsync, vblank, hblank, hfront_porch, vfront_porch;
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@ -703,25 +704,26 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
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intel_gmbus_stop(mmio + PCH_GMBUS0);
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decode_edid(edid_data,
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sizeof(edid_data), &edid);
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mode = &edid.mode;
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/* Disable screen memory to prevent garbage from appearing. */
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vga_sr_write(1, vga_sr_read(1) | 0x20);
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hactive = edid.x_resolution;
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vactive = edid.y_resolution;
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right_border = edid.hborder;
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bottom_border = edid.vborder;
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hpolarity = (edid.phsync == '-');
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vpolarity = (edid.pvsync == '-');
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vsync = edid.vspw;
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hsync = edid.hspw;
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vblank = edid.vbl;
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hblank = edid.hbl;
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hfront_porch = edid.hso;
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vfront_porch = edid.vso;
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right_border = mode->hborder;
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bottom_border = mode->vborder;
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hpolarity = (mode->phsync == '-');
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vpolarity = (mode->pvsync == '-');
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vsync = mode->vspw;
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hsync = mode->hspw;
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vblank = mode->vbl;
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hblank = mode->hbl;
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hfront_porch = mode->hso;
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vfront_porch = mode->vso;
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target_frequency = info->gfx.lvds_dual_channel ? edid.pixel_clock
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: (2 * edid.pixel_clock);
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target_frequency = info->gfx.lvds_dual_channel ? mode->pixel_clock
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: (2 * mode->pixel_clock);
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vga_textmode_init();
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#if IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)
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vga_sr_write(1, 1);
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@ -788,8 +790,8 @@ static void intel_gma_init(const struct northbridge_intel_nehalem_config *info,
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return;
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}
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link_m1 = ((uint64_t)link_n1 * edid.pixel_clock) / link_frequency;
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data_m1 = ((uint64_t)data_n1 * 18 * edid.pixel_clock)
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link_m1 = ((uint64_t)link_n1 * mode->pixel_clock) / link_frequency;
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data_m1 = ((uint64_t)data_n1 * 18 * mode->pixel_clock)
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/ (link_frequency * 8 * (info->gfx.lvds_num_lanes ? : 4));
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printk(BIOS_INFO, "bringing up panel at resolution %d x %d\n",
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