diff --git a/src/mainboard/google/brox/chromeos.c b/src/mainboard/google/brox/chromeos.c
index 5c99371eb1..d0fc9f9e77 100644
--- a/src/mainboard/google/brox/chromeos.c
+++ b/src/mainboard/google/brox/chromeos.c
@@ -12,7 +12,7 @@ void fill_lb_gpios(struct lb_gpios *gpios)
 		{-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
 		{-1, ACTIVE_HIGH, 0, "power"},
 		{-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
-		{GPIO_EC_IN_RW, ACTIVE_HIGH, gpio_get(GPIO_EC_IN_RW), "EC in RW"},
+
 	};
 	lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
 }
@@ -21,9 +21,3 @@ int get_write_protect_state(void)
 {
 	return gpio_get(GPIO_PCH_WP);
 }
-
-int get_ec_is_trusted(void)
-{
-	/* EC is trusted if not in RW. */
-	return !gpio_get(GPIO_EC_IN_RW);
-}
diff --git a/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h b/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
index 0de7ffd36c..794394fc72 100644
--- a/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
+++ b/src/mainboard/google/brox/variants/baseboard/brox/include/baseboard/gpio.h
@@ -12,8 +12,6 @@
 #define GPE_EC_WAKE		GPE0_DW2_17
 /* WP signal to PCH */
 #define GPIO_PCH_WP		GPP_E15
-/* EC in RW or RO */
-#define GPIO_EC_IN_RW		GPP_F18
 /* Used to gate SoC's SLP_S0# signal */
 #define GPIO_SLP_S0_GATE	GPP_F9
 /* GPIO IRQ for tight timestamps / wake support */