Move support for Deschutes Slot 1 CPUs (model_65x) into its own directory.
abuild-tested. I have no Deschutes CPUs to boot test this with. Signed-off-by: Keith Hui <buurin@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Keith Hui
Uwe Hermann
parent
af8b2b91b4
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b14fb6abd6
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@ -0,0 +1,3 @@
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config CPU_INTEL_MODEL_65X
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bool
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select SMP
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@ -0,0 +1,22 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2010 Keith Hui <buurin@gmail.com>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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driver-y += model_65x_init.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2010 Keith Hui <buurin@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdint.h>
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#include <device/device.h>
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#include <device/pci.h>
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#include <cpu/cpu.h>
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#include <cpu/x86/mtrr.h>
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#include <cpu/x86/msr.h>
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#include <cpu/x86/lapic.h>
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#include <cpu/intel/microcode.h>
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#include <cpu/x86/cache.h>
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static u32 microcode_updates[] = {
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/* Dummy terminator */
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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0x0, 0x0, 0x0, 0x0,
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};
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static void model_65x_init(device_t dev)
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{
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/* Turn on caching if we haven't already */
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x86_enable_cache();
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x86_setup_mtrrs(36);
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x86_mtrr_check();
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/* Update the microcode */
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intel_update_microcode(microcode_updates);
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/* Enable the local cpu apics */
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setup_lapic();
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};
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static struct device_operations cpu_dev_ops = {
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.init = model_65x_init,
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};
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/*
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* Intel Pentium II Processor Specification Update
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* http://download.intel.com/design/PentiumII/specupdt/24333749.pdf
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*
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* Mobile Intel Pentium II Processor Specification Update
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* http://download.intel.com/design/intarch/specupdt/24388757.pdf
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*
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* Intel Pentium II Xeon Processor Specification Update
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* http://download.intel.com/support/processors/pentiumii/xeon/24377632.pdf
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*/
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static struct cpu_device_id cpu_table[] = {
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{ X86_VENDOR_INTEL, 0x0650 }, /* PII/Celeron, dA0/mdA0/A0 */
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{ X86_VENDOR_INTEL, 0x0651 }, /* PII/Celeron, dA1/A1 */
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{ X86_VENDOR_INTEL, 0x0652 }, /* PII/Celeron/Xeon, dB0/mdB0/B0 */
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{ X86_VENDOR_INTEL, 0x0653 }, /* PII/Xeon, dB1/B1 */
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{ 0, 0 },
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};
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static const struct cpu_driver driver __cpu_driver = {
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.ops = &cpu_dev_ops,
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.id_table = cpu_table,
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};
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@ -20,6 +20,7 @@
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ramstage-y += slot_1.c
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ramstage-y += slot_1.c
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subdirs-y += ../model_6xx
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subdirs-y += ../model_6xx
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subdirs-y += ../model_65x
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subdirs-y += ../model_67x
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subdirs-y += ../model_67x
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subdirs-y += ../model_6bx
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subdirs-y += ../model_6bx
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subdirs-y += ../../x86/tsc
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subdirs-y += ../../x86/tsc
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