AGESA f15tn f16kb: Fix HUDSON_XHCI_ENABLE
Control for XHCI was split to handle AMD_INIT_RESET in agesawrapper while AMD_INIT_ENV was already handled as part of BiosCallouts. OEM configuration is supposed to be implemented as part of BiosCallouts, leaving agesawrapper agnostic of platform details. TODO: S3 resume for XHCI1. Change-Id: Id5e9c25a227db4d821f1be4b176470547ca4ea84 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/6241 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
This commit is contained in:
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@ -194,9 +194,11 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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if (StdHeader->Func == AMD_INIT_RESET) {
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if (StdHeader->Func == AMD_INIT_RESET) {
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//FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *) FchData;
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_reset->FchReset.Xhci1Enable = FALSE;
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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@ -209,11 +211,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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oem_fan_control(FchParams_env);
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oem_fan_control(FchParams_env);
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/* XHCI configuration */
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/* XHCI configuration */
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#if CONFIG_HUDSON_XHCI_ENABLE
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FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_env->Usb.Xhci0Enable = TRUE;
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#else
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FchParams_env->Usb.Xhci0Enable = FALSE;
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#endif
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FchParams_env->Usb.Xhci1Enable = FALSE;
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FchParams_env->Usb.Xhci1Enable = FALSE;
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/* sata configuration */
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/* sata configuration */
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@ -165,10 +165,6 @@ AGESA_STATUS agesawrapper_amdinitreset(void)
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdCreateStruct (&AmdParamStruct);
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AmdResetParams.HtConfig.Depth = 0;
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AmdResetParams.HtConfig.Depth = 0;
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#if !CONFIG_HUDSON_XHCI_ENABLE
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AmdResetParams.FchInterface.Xhci0Enable = FALSE;
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#endif
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AmdResetParams.FchInterface.Xhci1Enable = FALSE;
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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@ -194,10 +194,12 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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if (StdHeader->Func == AMD_INIT_RESET) {
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if (StdHeader->Func == AMD_INIT_RESET) {
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *) FchData;
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
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FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
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FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_reset->FchReset.Xhci1Enable = FALSE;
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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@ -210,11 +212,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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oem_fan_control(FchParams_env);
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oem_fan_control(FchParams_env);
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/* XHCI configuration */
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/* XHCI configuration */
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#if CONFIG_HUDSON_XHCI_ENABLE
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FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_env->Usb.Xhci0Enable = TRUE;
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#else
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FchParams_env->Usb.Xhci0Enable = FALSE;
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#endif
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FchParams_env->Usb.Xhci1Enable = FALSE;
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FchParams_env->Usb.Xhci1Enable = FALSE;
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/* sata configuration */
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/* sata configuration */
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@ -165,10 +165,6 @@ AGESA_STATUS agesawrapper_amdinitreset(void)
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdCreateStruct (&AmdParamStruct);
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AmdResetParams.HtConfig.Depth = 0;
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AmdResetParams.HtConfig.Depth = 0;
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#if !CONFIG_HUDSON_XHCI_ENABLE
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AmdResetParams.FchInterface.Xhci0Enable = FALSE;
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#endif
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AmdResetParams.FchInterface.Xhci1Enable = FALSE;
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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@ -165,8 +165,6 @@ AGESA_STATUS agesawrapper_amdinitreset(void)
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdCreateStruct (&AmdParamStruct);
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AmdResetParams.HtConfig.Depth = 0;
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AmdResetParams.HtConfig.Depth = 0;
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AmdResetParams.FchInterface.Xhci0Enable = FALSE;
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AmdResetParams.FchInterface.Xhci1Enable = FALSE;
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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@ -307,9 +307,11 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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if (StdHeader->Func == AMD_INIT_RESET) {
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if (StdHeader->Func == AMD_INIT_RESET) {
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//FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *) FchData;
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_reset->FchReset.Xhci1Enable = FALSE;
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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@ -322,11 +324,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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//oem_fan_control(FchParams_env);
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//oem_fan_control(FchParams_env);
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/* XHCI configuration */
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/* XHCI configuration */
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#if CONFIG_HUDSON_XHCI_ENABLE
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FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_env->Usb.Xhci0Enable = TRUE;
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#else
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FchParams_env->Usb.Xhci0Enable = FALSE;
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#endif
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FchParams_env->Usb.Xhci1Enable = FALSE;
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FchParams_env->Usb.Xhci1Enable = FALSE;
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/* sata configuration */
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/* sata configuration */
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@ -194,10 +194,6 @@ AGESA_STATUS agesawrapper_amdinitreset(void)
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdCreateStruct (&AmdParamStruct);
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AmdResetParams.HtConfig.Depth = 0;
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AmdResetParams.HtConfig.Depth = 0;
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#if !CONFIG_HUDSON_XHCI_ENABLE
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AmdResetParams.FchInterface.Xhci0Enable = FALSE;
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#endif
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AmdResetParams.FchInterface.Xhci1Enable = FALSE;
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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@ -83,9 +83,11 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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if (StdHeader->Func == AMD_INIT_RESET) {
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if (StdHeader->Func == AMD_INIT_RESET) {
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *) FchData;
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
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FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
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FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_reset->FchReset.Xhci1Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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@ -98,13 +100,8 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */
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FchParams_env->Hwm.HwmFchtsiAutoPoll = FALSE;/* 1 enable, 0 disable TSI Auto Polling */
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/* XHCI configuration */
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/* XHCI configuration */
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#if CONFIG_HUDSON_XHCI_ENABLE
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FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_env->Usb.Xhci0Enable = TRUE;
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FchParams_env->Usb.Xhci1Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_env->Usb.Xhci1Enable = TRUE;
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#else
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FchParams_env->Usb.Xhci0Enable = FALSE;
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FchParams_env->Usb.Xhci1Enable = FALSE;
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#endif
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}
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}
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printk(BIOS_DEBUG, "Done\n");
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printk(BIOS_DEBUG, "Done\n");
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@ -178,10 +178,6 @@ AGESA_STATUS agesawrapper_amdinitreset(void)
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdCreateStruct (&AmdParamStruct);
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AmdResetParams.HtConfig.Depth = 0;
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AmdResetParams.HtConfig.Depth = 0;
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#if !CONFIG_HUDSON_XHCI_ENABLE
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AmdResetParams.FchInterface.Xhci0Enable = FALSE;
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AmdResetParams.FchInterface.Xhci1Enable = FALSE;
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#endif
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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@ -190,10 +190,12 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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AMD_CONFIG_PARAMS *StdHeader = ConfigPtr;
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if (StdHeader->Func == AMD_INIT_RESET) {
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if (StdHeader->Func == AMD_INIT_RESET) {
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *) FchData;
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FCH_RESET_DATA_BLOCK *FchParams_reset = (FCH_RESET_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT RESET ");
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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//FchParams_reset->EcChannel0 = TRUE; /* logical devicd 3 */
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FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
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FchParams_reset->LegacyFree = IS_ENABLED(CONFIG_HUDSON_LEGACY_FREE);
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FchParams_reset->FchReset.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_reset->FchReset.Xhci1Enable = FALSE;
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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} else if (StdHeader->Func == AMD_INIT_ENV) {
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData;
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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printk(BIOS_DEBUG, "Fch OEM config in INIT ENV ");
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@ -206,11 +208,7 @@ AGESA_STATUS Fch_Oem_config(UINT32 Func, UINT32 FchData, VOID *ConfigPtr)
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oem_fan_control(FchParams_env);
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oem_fan_control(FchParams_env);
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/* XHCI configuration */
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/* XHCI configuration */
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#if CONFIG_HUDSON_XHCI_ENABLE
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FchParams_env->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams_env->Usb.Xhci0Enable = TRUE;
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#else
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FchParams_env->Usb.Xhci0Enable = FALSE;
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#endif
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FchParams_env->Usb.Xhci1Enable = FALSE;
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FchParams_env->Usb.Xhci1Enable = FALSE;
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/* sata configuration */
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/* sata configuration */
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@ -179,10 +179,6 @@ AGESA_STATUS agesawrapper_amdinitreset(void)
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdParamStruct.StdHeader.ImageBasePtr = 0;
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AmdCreateStruct (&AmdParamStruct);
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AmdCreateStruct (&AmdParamStruct);
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AmdResetParams.HtConfig.Depth = 0;
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AmdResetParams.HtConfig.Depth = 0;
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#if !CONFIG_HUDSON_XHCI_ENABLE
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AmdResetParams.FchInterface.Xhci0Enable = FALSE;
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#endif
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AmdResetParams.FchInterface.Xhci1Enable = FALSE;
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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status = AmdInitReset ((AMD_RESET_PARAMS *)AmdParamStruct.NewStructPtr);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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if (status != AGESA_SUCCESS) agesawrapper_amdreadeventlog(AmdParamStruct.StdHeader.HeapStatus);
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@ -111,10 +111,8 @@ void s3_resume_init_data(void *data)
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FchParams->Usb.Ohci4Enable = FchInterfaceDefault.Ohci4Enable;
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FchParams->Usb.Ohci4Enable = FchInterfaceDefault.Ohci4Enable;
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FchParams->HwAcpi.PwrFailShadow = FchInterfaceDefault.FchPowerFail;
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FchParams->HwAcpi.PwrFailShadow = FchInterfaceDefault.FchPowerFail;
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#if !CONFIG_HUDSON_XHCI_ENABLE
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FchParams->Usb.Xhci0Enable = IS_ENABLED(CONFIG_HUDSON_XHCI_ENABLE);
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FchParams->Usb.Xhci0Enable = FALSE;
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FchParams->Usb.Xhci1Enable = FALSE;
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#endif
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FchParams->Usb.Xhci1Enable = FALSE;
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#if DUMP_FCH_SETTING
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#if DUMP_FCH_SETTING
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int i;
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int i;
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