intel/skylake: Fix UART build options
1. skylake does not support UART over I/O. So, NO_UART_ON_SUPERIO needs to be selected by default. 2. Move BOOTBLOCK_CONSOLE under UART_DEBUG. 3. Include bootblock/uart.c only if UART_DEBUG is selected. Change-Id: I4e996bea2a25b3b1dfb9625d97985a9d3473561b Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/16025 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
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@ -13,7 +13,6 @@ config CPU_SPECIFIC_OPTIONS
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select ARCH_ROMSTAGE_X86_32
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select ARCH_ROMSTAGE_X86_32
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select ARCH_VERSTAGE_X86_32
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select ARCH_VERSTAGE_X86_32
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select ACPI_NHLT
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select ACPI_NHLT
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select BOOTBLOCK_CONSOLE
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select CACHE_MRC_SETTINGS
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select CACHE_MRC_SETTINGS
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select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
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select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE
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select C_ENVIRONMENT_BOOTBLOCK
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select C_ENVIRONMENT_BOOTBLOCK
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@ -159,9 +158,11 @@ config VGA_BIOS_ID
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config UART_DEBUG
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config UART_DEBUG
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bool "Enable UART debug port."
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bool "Enable UART debug port."
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default n
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default n
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select BOOTBLOCK_CONSOLE
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select CONSOLE_SERIAL
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select CONSOLE_SERIAL
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select DRIVERS_UART
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select DRIVERS_UART
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select DRIVERS_UART_8250MEM_32
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select DRIVERS_UART_8250MEM_32
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select NO_UART_ON_SUPERIO
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config CHIPSET_BOOTBLOCK_INCLUDE
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config CHIPSET_BOOTBLOCK_INCLUDE
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string
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string
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@ -14,7 +14,7 @@ bootblock-y += bootblock/cache_as_ram.S
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bootblock-y += bootblock/cpu.c
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bootblock-y += bootblock/cpu.c
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bootblock-y += bootblock/pch.c
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bootblock-y += bootblock/pch.c
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bootblock-y += bootblock/systemagent.c
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bootblock-y += bootblock/systemagent.c
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bootblock-y += bootblock/uart.c
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bootblock-$(CONFIG_UART_DEBUG) += bootblock/uart.c
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bootblock-y += gpio.c
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bootblock-y += gpio.c
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bootblock-y += monotonic_timer.c
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bootblock-y += monotonic_timer.c
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bootblock-y += pch.c
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bootblock-y += pch.c
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