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northbridge/amd/amdfam10: Rename mislabeled iommu nvram option to gart 

Change-Id: Ia24102e164eb5753ade3f9b5ab21eba2fa60836b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12046
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Timothy Pearson 2015-08-11 17:52:03 -05:00 committed by Martin Roth
parent 593f5c8a48
commit b174667534
26 changed files with 31 additions and 31 deletions
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2
src/mainboard/advansus/a785e-i/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/amd/bimini_fam10/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/amd/mahogany_fam10/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/amd/serengeti_cheetah_fam10/cmos.layout
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@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
446 1 e 1 power_on_after_fail
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection

2
src/mainboard/amd/tilapia_fam10/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/asus/kfsn4-dre/cmos.layout
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@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
446 1 e 1 power_on_after_fail
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection

2
src/mainboard/asus/kgpe-d16/cmos.default
View File

@ -3,7 +3,7 @@ debug_level = Spew
multi_core = Enable
slow_cpu = off
compute_unit_siblings = Enable
iommu = Disable
gart = Disable
nmi = Disable
hypertransport_speed_limit = Auto
max_mem_clock = DDR3-1600

2
src/mainboard/asus/kgpe-d16/cmos.layout
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@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
446 2 e 3 power_on_after_fail
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection

2
src/mainboard/asus/m4a78-em/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/asus/m4a785-m/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/asus/m4a785t-m/cmos.default
View File

@ -9,4 +9,4 @@ power_on_after_fail=Disable
debug_level=Spew
slow_cpu=off
nmi=Enable
iommu=Enable
gart=Enable

2
src/mainboard/asus/m4a785t-m/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/asus/m5a88-v/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/avalue/eax-785e/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/gigabyte/ma785gm/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/gigabyte/ma785gmt/cmos.layout
View File

@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/gigabyte/ma78gm/cmos.layout
View File

@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/hp/dl165_g6_fam10/cmos.layout
View File

@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection
728 256 h 0 user_data

2
src/mainboard/iei/kino-780am2-fam10/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/jetway/pa78vm5/cmos.layout
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@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/msi/ms9652_fam10/cmos.layout
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@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
446 1 e 1 power_on_after_fail
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection

2
src/mainboard/supermicro/h8dmr_fam10/cmos.layout
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@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
446 1 e 1 power_on_after_fail
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection

2
src/mainboard/supermicro/h8qme_fam10/cmos.layout
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@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
446 1 e 1 power_on_after_fail
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection

2
src/mainboard/supermicro/h8scm_fam10/cmos.layout
View File

@ -12,7 +12,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
456 1 e 1 ECC_memory
728 256 h 0 user_data
984 16 h 0 check_sum

2
src/mainboard/tyan/s2912_fam10/cmos.layout
View File

@ -31,7 +31,7 @@ entries
412 4 e 6 debug_level
440 4 e 9 slow_cpu
444 1 e 1 nmi
445 1 e 1 iommu
445 1 e 1 gart
446 1 e 1 power_on_after_fail
456 1 e 1 ECC_memory
457 1 e 1 ECC_redirection

12
src/northbridge/amd/amdfam10/misc_control.c
View File

@ -38,7 +38,7 @@
*
* @param dev
*
* There is only one AGP aperture resource needed. The resoruce is added to
* There is only one AGP aperture resource needed. The resource is added to
* the northbridge of BSP.
*
* The same trick can be used to augment legacy VGA resources which can
@ -50,7 +50,7 @@
static void mcf3_read_resources(device_t dev)
{
struct resource *resource;
unsigned char iommu;
unsigned char gart;
/* Read the generic PCI resources */
pci_dev_read_resources(dev);
@ -59,13 +59,13 @@ static void mcf3_read_resources(device_t dev)
return;
}
iommu = 1;
get_option(&iommu, "iommu");
gart = 1;
get_option(&gart, "gart");
if (iommu) {
if (gart) {
/* Add a Gart apeture resource */
resource = new_resource(dev, 0x94);
resource->size = iommu?CONFIG_AGP_APERTURE_SIZE:1;
resource->size = gart?CONFIG_AGP_APERTURE_SIZE:1;
resource->align = log2(resource->size);
resource->gran = log2(resource->size);
resource->limit = 0xffffffff; /* 4G */