sb/intel/*: Remove romcc guards

These platforms now use a GCC compiled bootblock.

Change-Id: I9a0139f497fe84860664195ed6584f90daecec16
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37217
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/southbridge/intel/bd82x6x/pch.h

@@ -90,10 +90,8 @@ struct southbridge_usb_port
 	int oc_pin;
 };
 
-#ifndef __ROMCC__
 void pch_enable(struct device *dev);
 extern const struct southbridge_usb_port mainboard_usb_ports[14];
-#endif
 
 void early_usb_init(const struct southbridge_usb_port *portmap);
 

src/southbridge/intel/i82371eb/i82371eb.h

@@ -19,10 +19,8 @@
 
 #if !defined(__ACPI__)
 
-#ifndef __ROMCC__
 #include <device/device.h>
 void i82371eb_enable(struct device *dev);
-#endif
 
 void i82371eb_hard_reset(void);
 

src/southbridge/intel/i82801gx/i82801gx.h

@@ -34,10 +34,8 @@
 #ifndef __ACPI__
 #define DEBUG_PERIODIC_SMIS 0
 
-#ifndef __ROMCC__
 #include <device/device.h>
 void i82801gx_enable(struct device *dev);
-#endif
 
 void enable_smbus(void);
 void i82801gx_lpc_setup(void);

src/southbridge/intel/ibexpeak/pch.h

@@ -89,11 +89,9 @@ struct southbridge_usb_port {
 
 void early_usb_init(const struct southbridge_usb_port *portmap);
 
-#ifndef __ROMCC__
 extern const struct southbridge_usb_port mainboard_usb_ports[14];
 #include <device/device.h>
 void pch_enable(struct device *dev);
-#endif
 
 #define MAINBOARD_POWER_OFF	0
 #define MAINBOARD_POWER_ON	1