soc,mb/intel: clean up remaining FSP2.0 socs/boards
Remove CONFIG_...FSP2.0 based if-switches from FSP2.0-only socs/boards Change-Id: Iae92dc2e2328b14c78ac686aaf326bd68430933b Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36279 Reviewed-by: Michael Niewöhner Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -23,7 +23,6 @@ config BOARD_SPECIFIC_OPTIONS
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select SOC_INTEL_QUARK
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select MAINBOARD_HAS_I2C_TPM_ATMEL
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select MAINBOARD_HAS_TPM2
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select PLATFORM_USES_FSP2_0
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select UDK_2015_BINDING
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@ -103,7 +102,6 @@ config FSP_DEBUG_ALL
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Turn on debug support to display HOBS, MTRRS, SMM_MEMORY_MAP, UPD_DATA
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also turn on FSP 2.0 debug support for ESRAM_LAYOUT,
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FSP_CALLS_AND_STATUS, FSP_HEADER, POSTCAR_CONSOLE and VERIFY_HOBS
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or FSP 1.1 DISPLAY_FSP_ENTRY_POINTS
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config VBOOT_WITH_CRYPTO_SHIELD
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bool "Verified boot using the Crypto Shield board"
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@ -53,7 +53,6 @@ config HAVE_IFD_BIN
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config ADD_FSP_BINARIES
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bool "Add FSP blobs"
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depends on PLATFORM_USES_FSP2_0
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default n
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config FSP_M_FILE
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@ -49,7 +49,6 @@ config HAVE_IFD_BIN
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config ADD_FSP_BINARIES
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bool "Add FSP blobs"
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depends on PLATFORM_USES_FSP2_0
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default n
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config FSP_M_FILE
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@ -22,7 +22,7 @@ bootblock-y += uart.c
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romstage-y += car.c
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romstage-y += ../../../cpu/intel/car/romstage.c
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romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c
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romstage-y += romstage.c
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romstage-y += gspi.c
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romstage-y += heci.c
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romstage-y += i2c.c
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@ -49,7 +49,7 @@ ramstage-y += nhlt.c
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ramstage-y += p2sb.c
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ramstage-y += pmc.c
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ramstage-y += pmutil.c
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ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
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ramstage-y += reset.c
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ramstage-y += smmrelocate.c
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ramstage-y += spi.c
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ramstage-y += systemagent.c
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@ -48,7 +48,7 @@ ramstage-y += memmap.c
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ramstage-y += p2sb.c
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ramstage-y += pmc.c
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ramstage-y += pmutil.c
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ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
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ramstage-y += reset.c
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ramstage-y += smmrelocate.c
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ramstage-y += spi.c
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ramstage-y += systemagent.c
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@ -29,6 +29,7 @@ config CPU_SPECIFIC_OPTIONS
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select C_ENVIRONMENT_BOOTBLOCK
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select NO_MMCONF_SUPPORT
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select REG_SCRIPT
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select PLATFORM_USES_FSP2_0
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select SOC_INTEL_COMMON
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select SOC_INTEL_COMMON_RESET
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select SOC_SETS_MSRS
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@ -113,8 +114,7 @@ config ENABLE_DEBUG_LED_BOOTBLOCK_ENTRY
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select ENABLE_DEBUG_LED
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help
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Indicate that bootblock_c_entry was entered. If the SD LED does not
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light then debug the code between ESRAM and bootblock_c_entry. For
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FSP 1.1, use ENABLE_DEBUG_LED_FINDFSP to split this code.
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light then debug the code between ESRAM and bootblock_c_entry.
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config ENABLE_DEBUG_LED_SOC_EARLY_INIT_ENTRY
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bool "SD LED indicates bootblock_soc_early_init successfully entered"
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@ -192,12 +192,10 @@ config FSP_ESRAM_LOC
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config FSP_M_FILE
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string
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depends on PLATFORM_USES_FSP2_0
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default "3rdparty/blobs/soc/intel/quark/$(CONFIG_FSP_TYPE)/$(CONFIG_FSP_BUILD_TYPE)/FSP_M.fd"
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config FSP_S_FILE
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string
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depends on PLATFORM_USES_FSP2_0
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default "3rdparty/blobs/soc/intel/quark/$(CONFIG_FSP_TYPE)/$(CONFIG_FSP_BUILD_TYPE)/FSP_S.fd"
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#####
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@ -37,9 +37,9 @@ romstage-y += reg_access.c
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romstage-$(CONFIG_STORAGE_TEST) += storage_test.c
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romstage-y += tsc_freq.c
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romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
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romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
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romstage-y += reset.c
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postcar-y += fsp2_0.c
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postcar-y += fsp_params.c
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postcar-y += i2c.c
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postcar-y += memmap.c
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postcar-y += reg_access.c
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@ -49,14 +49,14 @@ postcar-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
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ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
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ramstage-y += chip.c
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ramstage-y += ehci.c
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ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp2_0.c
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ramstage-y += fsp_params.c
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ramstage-y += gpio_i2c.c
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ramstage-y += i2c.c
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ramstage-y += lpc.c
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ramstage-y += memmap.c
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ramstage-y += northcluster.c
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ramstage-y += reg_access.c
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ramstage-$(CONFIG_PLATFORM_USES_FSP2_0) += reset.c
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ramstage-y += reset.c
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ramstage-y += sd.c
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ramstage-y += spi.c
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ramstage-y += spi_debug.c
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@ -14,10 +14,8 @@
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#
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romstage-y += car.c
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ifeq ($(CONFIG_PLATFORM_USES_FSP2_0),y)
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romstage-$(CONFIG_DISPLAY_UPD_DATA) += debug.c
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romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += fsp2_0.c
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endif # CONFIG_PLATFORM_USES_FSP2_0
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romstage-y += fsp_params.c
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romstage-y += mtrr.c
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romstage-y += pcie.c
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romstage-y += report_platform.c
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