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sb/intel/i82801dx: Add call i8259_setup() 

Observed with aopen/dxplplusu that without SeaBIOS (using GRUB2
payload) Linux kernel panics.

< [    0.000000] Using NULL legacy PIC
< [    0.000000] NR_IRQS: 2304, nr_irqs: 1024, preallocated irqs: 0
...
< [    0.000000] unexpected #NM exception: ffff [#1] SMP PTI

versus

> [    0.000000] NR_IRQS: 2304, nr_irqs: 1024, preallocated irqs: 16
...
> [    0.004000] Enabling APIC mode:  Flat.  Using 3 I/O APICs
> [    0.008000] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0
> [    0.028000] tsc: Fast TSC calibration using PIT
> [    0.032000] tsc: Detected 3198.436 MHz processor

Change-Id: I1beb93a8fd04697f259aefddfd369aa79e3359b7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
This commit is contained in:
Kyösti Mälkki 2022-01-17 13:57:55 +02:00
parent ad489d889b
commit b196834b62
1 changed files with 5 additions and 2 deletions
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7
src/southbridge/intel/i82801dx/lpc.c
View File

@ -1,5 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <arch/io.h>
#include <arch/ioapic.h>
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
@ -8,8 +10,7 @@
#include <option.h>
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <arch/io.h>
#include <arch/ioapic.h>
#include <pc80/i8259.h>
#include "chip.h"
#include "i82801dx.h"
@ -273,6 +274,8 @@ static void lpc_init(struct device *dev)
/* Initialize the High Precision Event Timers */
enable_hpet(dev);
setup_i8259();
/* Don't allow evil boot loaders, kernels, or
* userspace applications to deceive us:
*/