mb/intel/adlrvp: Disable non-existing BT PCI interface and add BT flag
Remove the CNVi Bt PCI config and add Bt flag. There is no PCI host interface in this version of CNVi. TEST: BT is checked using 'lsusb -d 8087:0026' from OS. Change-Id: I17c3e2761f91fb397d140d1954b6d4b451c4c603 Signed-off-by: Cliff Huang <cliff.huang@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51351 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
parent
bc1941f178
commit
b1a128fc88
|
@ -14,6 +14,9 @@ chip soc/intel/alderlake
|
||||||
|
|
||||||
# FSP configuration
|
# FSP configuration
|
||||||
|
|
||||||
|
# Enable CNVi BT
|
||||||
|
register "CnviBtCore" = "true"
|
||||||
|
|
||||||
register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # Type-C Port1
|
register "usb2_ports[0]" = "USB2_PORT_MID(OC0)" # Type-C Port1
|
||||||
register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" # Type-C Port2
|
register "usb2_ports[1]" = "USB2_PORT_MID(OC0)" # Type-C Port2
|
||||||
register "usb2_ports[2]" = "USB2_PORT_MID(OC3)" # Type-C Port3
|
register "usb2_ports[2]" = "USB2_PORT_MID(OC3)" # Type-C Port3
|
||||||
|
@ -212,7 +215,6 @@ chip soc/intel/alderlake
|
||||||
device pci 0e.0 off end # VMD
|
device pci 0e.0 off end # VMD
|
||||||
device pci 10.0 off end
|
device pci 10.0 off end
|
||||||
device pci 10.1 off end
|
device pci 10.1 off end
|
||||||
device pci 10.2 on end # CNVi: BT
|
|
||||||
device pci 10.6 off end # THC0
|
device pci 10.6 off end # THC0
|
||||||
device pci 10.7 off end # THC1
|
device pci 10.7 off end # THC1
|
||||||
device pci 11.0 off end
|
device pci 11.0 off end
|
||||||
|
|
Loading…
Reference in New Issue