diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
index 7669b183fc..582ee128f0 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb
@@ -109,13 +109,14 @@ chip soc/intel/tigerlake
 		[PchSerialIoIndexUART2] = PchSerialIoPci,
 	}"
 
+	# TCSS USB3
+	register "TcssXhciEn" = "1"
+	register "TcssAuxOri" = "0"
+
 	# D3Hot and D3Cold for TCSS
 	register "TcssD3HotEnable" = "1"
 	register "TcssD3ColdEnable" = "1"
 
-	# TCSS USB3
-	register "TcssAuxOri" = "0"
-
 	#HD Audio
 	register "PchHdaDspEnable" = "1"
 	register "PchHdaAudioLinkHdaEnable" = "0"
@@ -153,17 +154,17 @@ chip soc/intel/tigerlake
 		device pci 04.0 on  end # DPTF			0x9A03
 		device pci 05.0 on  end # IPU			0x9A19
 		device pci 06.0 on  end # PEG60			0x9A09
-		device pci 07.0 off end # TBT_PCIe0		0x9A23
-		device pci 07.1 off end # TBT_PCIe1		0x9A25
-		device pci 07.2 off end # TBT_PCIe2		0x9A27
-		device pci 07.3 off end # TBT_PCIe3		0x9A29
+		device pci 07.0 on  end # TBT_PCIe0		0x9A23
+		device pci 07.1 on  end # TBT_PCIe1		0x9A25
+		device pci 07.2 on  end # TBT_PCIe2		0x9A27
+		device pci 07.3 on  end # TBT_PCIe3		0x9A29
 		device pci 08.0 off end # GNA			0x9A11
 		device pci 09.0 off end # NPK			0x9A33
 		device pci 0a.0 off end # Crash-log SRAM	0x9A0D
 		device pci 0d.0 on  end # USB xHCI		0x9A13
 		device pci 0d.1 on  end # USB xDCI (OTG)	0x9A15
-		device pci 0d.2 off end # TBT DMA0		0x9A1B
-		device pci 0d.3 off end # TBT DMA1		0x9A1D
+		device pci 0d.2 on  end # TBT DMA0		0x9A1B
+		device pci 0d.3 on  end # TBT DMA1		0x9A1D
 		device pci 0e.0 off end # VMD			0x9A0B
 
 		# From PCH EDS(576591)
diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
index 1d1d6dc633..d15da3083a 100644
--- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
+++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb
@@ -105,13 +105,14 @@ chip soc/intel/tigerlake
 		[PchSerialIoIndexUART2] = PchSerialIoPci,
 	}"
 
+	# TCSS USB3
+	register "TcssXhciEn" = "1"
+	register "TcssAuxOri" = "0"
+
 	# D3Hot and D3Cold for TCSS
 	register "TcssD3HotEnable" = "1"
 	register "TcssD3ColdEnable" = "1"
 
-	# TCSS USB3
-	register "TcssAuxOri" = "0"
-
 	#HD Audio
 	register "PchHdaDspEnable" = "1"
 	register "PchHdaAudioLinkHdaEnable" = "0"
@@ -149,17 +150,17 @@ chip soc/intel/tigerlake
 		device pci 04.0 on  end # DPTF			0x9A03
 		device pci 05.0 on  end # IPU			0x9A19
 		device pci 06.0 on  end # PEG60			0x9A09
-		device pci 07.0 off end # TBT_PCIe0		0x9A23
-		device pci 07.1 off end # TBT_PCIe1		0x9A25
-		device pci 07.2 off end # TBT_PCIe2		0x9A27
-		device pci 07.3 off end # TBT_PCIe3		0x9A29
+		device pci 07.0 on  end # TBT_PCIe0		0x9A23
+		device pci 07.1 on  end # TBT_PCIe1		0x9A25
+		device pci 07.2 on  end # TBT_PCIe2		0x9A27
+		device pci 07.3 on  end # TBT_PCIe3		0x9A29
 		device pci 08.0 off end # GNA			0x9A11
 		device pci 09.0 off end # NPK			0x9A33
 		device pci 0a.0 off end # Crash-log SRAM	0x9A0D
 		device pci 0d.0 on  end # USB xHCI		0x9A13
 		device pci 0d.1 on  end # USB xDCI (OTG)	0x9A15
-		device pci 0d.2 off end # TBT DMA0		0x9A1B
-		device pci 0d.3 off end # TBT DMA1		0x9A1D
+		device pci 0d.2 on  end # TBT DMA0		0x9A1B
+		device pci 0d.3 on  end # TBT DMA1		0x9A1D
 		device pci 0e.0 off end # VMD			0x9A0B
 
 		# From PCH EDS(576591)