vc/amd/fsp/picasso: Add FSP-M UPD enable_sata to 0xC7 to match FSP

BUG=b:162302027
BRANCH=zork

Signed-off-by: Nikolai Vyssotski <nikolai.vyssotski@amd.corp-partner.google.com>
Change-Id: I4b5c3b351b6232f8b0418ead47d87aaddd350668
Cq-Depend: chrome-internal:3201648
Cq-Depend: chrome-internal:3202602
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44863
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nikolai Vyssotski 2020-08-26 12:10:25 -05:00 committed by Furquan Shaikh
parent 6da1710fbc
commit b1c7ed326a
1 changed files with 1 additions and 1 deletions

View File

@ -54,7 +54,7 @@ typedef struct __packed {
/** Offset 0x00C4**/ uint8_t aclk_dpm0_freq_400MHz;
/** Offset 0x00C5**/ uint8_t unused5;
/** Offset 0x00C6**/ uint8_t unused6;
/** Offset 0x00C7**/ uint8_t unused7;
/** Offset 0x00C7**/ uint8_t sata_enable;
/** Offset 0x00C8**/ uint32_t tseg_size;
/** Offset 0x00CC**/ uint8_t pspp_policy;
/** Offset 0x00CD**/ uint8_t audio_soundwire;