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SMI: Change order of SMI_EN and PM1_EN init 

This appears to fix an infrequent resume hang on Ivybridge.

Tested on 2 devices with 15k suspend/resume cycles each

Change-Id: I53618bc7966824413f1720a2be3cbd2550e29473
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/1704
Reviewed-by: Marc Jones <marcj303@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Duncan Laurie 2012-08-13 09:41:54 -07:00 committed by Stefan Reinauer
parent 4dceba25af
commit b1c8f81b25
1 changed files with 5 additions and 5 deletions
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10
src/southbridge/intel/bd82x6x/smi.c
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@ -269,6 +269,11 @@ static void smm_relocate(void)
gpe0_en &= ~PME_B0_EN; gpe0_en &= ~PME_B0_EN;
outl(gpe0_en, pmbase + GPE0_EN); outl(gpe0_en, pmbase + GPE0_EN);
pm1_en = 0;
pm1_en |= PWRBTN_EN;
pm1_en |= GBL_EN;
outw(pm1_en, pmbase + PM1_EN);
/* Enable SMI generation: /* Enable SMI generation:
* - on TCO events * - on TCO events
* - on APMC writes (io 0xb2) * - on APMC writes (io 0xb2)
@ -301,11 +306,6 @@ static void smm_relocate(void)
outl(smi_en, pmbase + SMI_EN); outl(smi_en, pmbase + SMI_EN);
pm1_en = 0;
pm1_en |= PWRBTN_EN;
pm1_en |= GBL_EN;
outw(pm1_en, pmbase + PM1_EN);
/** /**
* There are several methods of raising a controlled SMI# via * There are several methods of raising a controlled SMI# via
* software, among them: * software, among them: