mb/google/rex: Set GPIO Tier-1 GPEs in devicetree

Set GPE route as
GPE0_DW0 -> GPP_A
GPE0_DW1 -> GPP_E
GPE0_DW2 -> GPP_F

BUG=b:224325352
TEST=Verified in emulator that there is no regression

Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I5e3e09cfc06d2556ea32cca23b3dae114a510498
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66011
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
This commit is contained in:
Kapil Porwal 2022-07-20 14:10:05 +00:00 committed by Felix Held
parent 15faf7ea6a
commit b1c9f7fd12
1 changed files with 5 additions and 0 deletions

View File

@ -1,5 +1,10 @@
chip soc/intel/meteorlake chip soc/intel/meteorlake
# GPE configuration
register "pmc_gpe0_dw0" = "GPP_A"
register "pmc_gpe0_dw1" = "GPP_E"
register "pmc_gpe0_dw2" = "GPP_F"
# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
register "gen1_dec" = "0x00fc0801" register "gen1_dec" = "0x00fc0801"
register "gen2_dec" = "0x000c0201" register "gen2_dec" = "0x000c0201"