soc/intel/common: Add IOE P2SB for TCSS

Meteor Lake has the IOE Die for TCSS. This change adds the IOE P2SB
sideband access and exposes API for TCSS usage.

BUG=b:213574324
TEST=Build platforms coreboot images successfully.

Change-Id: I01f551b6e1f50ebdc1cef2ceee815a492030db19
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62721
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>

src/soc/intel/common/block/include/intelblocks/p2sb.h

@@ -29,6 +29,14 @@ void p2sb_disable_sideband_access(void);
 void p2sb_enable_bar(void);
 void p2sb_configure_hpet(void);
 
+/*
+ * Functions to access IOE P2SB.
+ * pid argument: SBI port Id
+ */
+void ioe_p2sb_enable_bar(void);
+uint32_t ioe_p2sb_sbi_read(uint8_t pid, uint16_t reg);
+void ioe_p2sb_sbi_write(uint8_t pid, uint16_t reg, uint32_t val);
+
 union p2sb_bdf {
 	struct {
 		uint16_t fn  : 3;

src/soc/intel/common/block/p2sb/Kconfig

@@ -9,3 +9,9 @@ config SOC_INTEL_COMMON_BLOCK_P2SB
 	select SOC_INTEL_COMMON_BLOCK_BASE_P2SB
 	help
 	  Intel Processor common P2SB driver for PCH or SoC die
+
+config SOC_INTEL_COMMON_BLOCK_IOE_P2SB
+	bool
+	select SOC_INTEL_COMMON_BLOCK_BASE_P2SB
+	help
+	  Intel Processor common P2SB driver for IOE die

src/soc/intel/common/block/p2sb/Makefile.inc

@@ -8,3 +8,9 @@ bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
 romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
 ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
 smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB) += p2sb.c
+
+# ioe_p2sb.c for IOE die P2SB IP
+bootblock-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c
+romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c
+smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB) += ioe_p2sb.c

src/soc/intel/common/block/p2sb/ioe_p2sb.c

@@ -0,0 +1,50 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#define __SIMPLE_DEVICE__
+
+#include <console/console.h>
+#include <device/pci.h>
+#include <device/pci_ids.h>
+#include <intelblocks/p2sb.h>
+#include <intelblocks/p2sblib.h>
+#include <intelblocks/pcr.h>
+#include <soc/iomap.h>
+#include <soc/pci_devs.h>
+
+uint32_t ioe_p2sb_sbi_read(uint8_t pid, uint16_t reg)
+{
+	return p2sb_dev_sbi_read(PCI_DEV_IOE_P2SB, pid, reg);
+}
+
+void ioe_p2sb_sbi_write(uint8_t pid, uint16_t reg, uint32_t val)
+{
+	p2sb_dev_sbi_write(PCI_DEV_IOE_P2SB, pid, reg, val);
+}
+
+void ioe_p2sb_enable_bar(void)
+{
+	p2sb_dev_enable_bar(PCI_DEV_IOE_P2SB, IOE_P2SB_BAR);
+}
+
+static void read_resources(struct device *dev)
+{
+	mmio_resource(dev, 0, IOE_P2SB_BAR / KiB, IOE_P2SB_SIZE / KiB);
+}
+
+struct device_operations device_ops = {
+	.read_resources   = read_resources,
+	.set_resources    = noop_set_resources,
+	.ops_pci          = &pci_dev_ops_pci,
+};
+
+static const unsigned short pci_device_ids[] = {
+	PCI_DID_INTEL_MTL_IOE_M_P2SB,
+	PCI_DID_INTEL_MTL_IOE_P_P2SB,
+	0,
+};
+
+static const struct pci_driver ioe_p2sb __pci_driver = {
+	.ops     = &device_ops,
+	.vendor  = PCI_VID_INTEL,
+	.devices = pci_device_ids,
+};

src/soc/intel/common/block/p2sb/p2sb.c

@@ -139,8 +139,6 @@ static const struct device_operations device_ops = {
 
 static const unsigned short pci_device_ids[] = {
 	PCI_DID_INTEL_MTL_SOC_P2SB,
-	PCI_DID_INTEL_MTL_IOE_M_P2SB,
-	PCI_DID_INTEL_MTL_IOE_P_P2SB,
 	PCI_DID_INTEL_APL_P2SB,
 	PCI_DID_INTEL_GLK_P2SB,
 	PCI_DID_INTEL_LWB_P2SB,