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mb/google/brya: Enable GL9755 SD card reader 

Enable GL9755 SD card reader.

BUG=b:185397257
TEST=SD card is functional in the OS.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Ib3be54274ca796bedda76ce807a0bd630d1d8e4f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52622
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Eric Lai 2021-04-23 14:34:57 +08:00 committed by Patrick Georgi
parent baecee1052
commit b1e8a8a6ce
4 changed files with 14 additions and 2 deletions
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1
src/mainboard/google/brya/Kconfig
View File

@ -21,6 +21,7 @@ config BOARD_GOOGLE_BASEBOARD_BRYA
select MAINBOARD_HAS_I2C_TPM_CR50
select MAINBOARD_HAS_TPM2
select SOC_INTEL_ALDERLAKE
select SOC_INTEL_COMMON_BLOCK_PCIE_RTD3
select SOC_INTEL_CSE_LITE_SKU
if BOARD_GOOGLE_BASEBOARD_BRYA

1
src/mainboard/google/brya/Kconfig.name
View File

@ -4,3 +4,4 @@ config BOARD_GOOGLE_BRYA0
select BASEBOARD_BRYA_LAPTOP
select BOARD_ROMSIZE_KB_32768
select ADL_ENABLE_USB4_PCIE_RESOURCES
select DRIVERS_GENESYSLOGIC_GL9755

6
src/mainboard/google/brya/variants/baseboard/gpio.c
View File

@ -154,7 +154,7 @@ static const struct pad_config gpio_table[] = {
/* D17 : UART1_RXD ==> SD_PE_PRSNT_L */
PAD_CFG_GPI(GPP_D17, NONE, DEEP),
/* D18 : UART1_TXD ==> SD_PE_RST_L */
PAD_CFG_GPO(GPP_D18, 0, DEEP),
PAD_CFG_GPO(GPP_D18, 1, DEEP),
/* D19 : I2S_MCLK1_OUT ==> I2S_MCLK_R */
PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
@ -283,7 +283,7 @@ static const struct pad_config gpio_table[] = {
/* H12 : I2C7_SDA ==> SD_PE_WAKE_ODL */
PAD_CFG_GPI(GPP_H12, NONE, DEEP),
/* H13 : I2C7_SCL ==> EN_PP3300_SD */
PAD_CFG_GPO(GPP_H13, 1, DEEP),
PAD_NC(GPP_H13, UP_20K),
/* H14 : NC */
PAD_NC(GPP_H14, NONE),
/* H15 : DDPB_CTRLCLK ==> DDIB_HDMI_CTRLCLK */
@ -394,6 +394,8 @@ static const struct pad_config early_gpio_table[] = {
PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2),
/* H11 : UART0_TXD ==> UART_PCH_TX_DBG_RX */
PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2),
/* H13 : I2C7_SCL ==> EN_PP3300_SD */
PAD_NC(GPP_H13, UP_20K),
};
const struct pad_config *__weak variant_gpio_table(size_t *num)

8
src/mainboard/google/brya/variants/brya0/overridetree.cb
View File

@ -12,6 +12,14 @@ chip soc/intel/alderlake
device generic 0 on end
end
end
device ref pcie_rp8 on
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D18)"
register "srcclk_pin" = "3"
device generic 0 on end
end
end #PCIE8 SD card
device ref i2c0 on
chip drivers/i2c/generic
register "hid" = ""10EC5682""