mb/emulation/qemu-i440fx,q35: Do resource transition
Change-Id: Ifb47e0d1d1b9c01c1332af4135f5578160c491a8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55924 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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@ -37,8 +37,7 @@ static void qemu_nb_read_resources(struct device *dev)
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if (CONFIG(ARCH_RAMSTAGE_X86_64)) {
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/* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */
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reserved_ram_resource_kb(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC / KiB,
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(6 * 0x1000) / KiB);
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reserved_ram_range(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC, 6 * 0x1000);
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}
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}
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@ -47,7 +47,7 @@ static void cpu_pci_domain_read_resources(struct device *dev)
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int i440fx = (nbid == 0x1237);
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int q35 = (nbid == 0x29c0);
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struct resource *res;
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unsigned long tomk = 0, high;
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unsigned long tomk = 0;
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int idx = 10;
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FWCfgFile f;
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@ -65,12 +65,10 @@ static void cpu_pci_domain_read_resources(struct device *dev)
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list[i].address, list[i].length);
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if (list[i].address == 0) {
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tomk = list[i].length / 1024;
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ram_resource_kb(dev, idx++, 0, 640);
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ram_resource_kb(dev, idx++, 768, tomk - 768);
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ram_from_to(dev, idx++, 0, 0xa0000);
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ram_from_to(dev, idx++, 0xc0000, tomk * KiB);
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} else {
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ram_resource_kb(dev, idx++,
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list[i].address / 1024,
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list[i].length / 1024);
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ram_range(dev, idx++, list[i].address, list[i].length);
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}
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break;
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case 2: /* reserved */
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@ -94,15 +92,16 @@ static void cpu_pci_domain_read_resources(struct device *dev)
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if (!tomk) {
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/* qemu older than 1.7, or reading etc/e820 failed. Fallback to cmos. */
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tomk = qemu_get_memory_size();
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high = qemu_get_high_memory_size();
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uint64_t high = qemu_get_high_memory_size();
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printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM below 4G.\n", tomk / 1024);
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printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM above 4G.\n", high / 1024);
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printk(BIOS_DEBUG, "QEMU: cmos: %llu MiB RAM above 4G.\n", high / 1024);
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/* Report the memory regions. */
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ram_resource_kb(dev, idx++, 0, 640);
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ram_resource_kb(dev, idx++, 768, tomk - 768);
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ram_from_to(dev, idx++, 0, 0xa0000);
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ram_from_to(dev, idx++, 0xc0000, tomk * KiB);
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if (high)
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ram_resource_kb(dev, idx++, 4 * 1024 * 1024, high);
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upper_ram_end(dev, idx++, 4ull * GiB + high * KiB);
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}
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/* Reserve I/O ports used by QEMU */
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@ -119,10 +118,10 @@ static void cpu_pci_domain_read_resources(struct device *dev)
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}
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/* A segment is legacy VGA region */
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mmio_resource_kb(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB);
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mmio_from_to(dev, idx++, 0xa0000, 0xc0000);
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/* C segment to 1MB is reserved RAM (low tables) */
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reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, (1 * MiB - 0xc0000) / KiB);
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reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
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if (q35 && ((tomk * 1024) < 0xb0000000)) {
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/*
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@ -55,12 +55,11 @@ static void qemu_nb_read_resources(struct device *dev)
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if (CONFIG(ARCH_RAMSTAGE_X86_64)) {
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/* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */
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reserved_ram_resource_kb(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC / KiB,
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(6 * 0x1000) / KiB);
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reserved_ram_range(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC, 6 * 0x1000);
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}
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smm_region(&tseg_base, &tseg_size);
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reserved_ram_resource_kb(dev, ESMRAMC, tseg_base / 1024, tseg_size / 1024);
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reserved_ram_range(dev, ESMRAMC, tseg_base, tseg_size);
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}
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