mb/emulation/qemu-i440fx,q35: Do resource transition

Change-Id: Ifb47e0d1d1b9c01c1332af4135f5578160c491a8
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55924
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki 2021-06-28 00:00:04 +03:00 committed by Felix Held
parent 906df950db
commit b20a714bfa
3 changed files with 15 additions and 18 deletions

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@ -37,8 +37,7 @@ static void qemu_nb_read_resources(struct device *dev)
if (CONFIG(ARCH_RAMSTAGE_X86_64)) { if (CONFIG(ARCH_RAMSTAGE_X86_64)) {
/* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */ /* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */
reserved_ram_resource_kb(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC / KiB, reserved_ram_range(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC, 6 * 0x1000);
(6 * 0x1000) / KiB);
} }
} }

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@ -47,7 +47,7 @@ static void cpu_pci_domain_read_resources(struct device *dev)
int i440fx = (nbid == 0x1237); int i440fx = (nbid == 0x1237);
int q35 = (nbid == 0x29c0); int q35 = (nbid == 0x29c0);
struct resource *res; struct resource *res;
unsigned long tomk = 0, high; unsigned long tomk = 0;
int idx = 10; int idx = 10;
FWCfgFile f; FWCfgFile f;
@ -65,12 +65,10 @@ static void cpu_pci_domain_read_resources(struct device *dev)
list[i].address, list[i].length); list[i].address, list[i].length);
if (list[i].address == 0) { if (list[i].address == 0) {
tomk = list[i].length / 1024; tomk = list[i].length / 1024;
ram_resource_kb(dev, idx++, 0, 640); ram_from_to(dev, idx++, 0, 0xa0000);
ram_resource_kb(dev, idx++, 768, tomk - 768); ram_from_to(dev, idx++, 0xc0000, tomk * KiB);
} else { } else {
ram_resource_kb(dev, idx++, ram_range(dev, idx++, list[i].address, list[i].length);
list[i].address / 1024,
list[i].length / 1024);
} }
break; break;
case 2: /* reserved */ case 2: /* reserved */
@ -94,15 +92,16 @@ static void cpu_pci_domain_read_resources(struct device *dev)
if (!tomk) { if (!tomk) {
/* qemu older than 1.7, or reading etc/e820 failed. Fallback to cmos. */ /* qemu older than 1.7, or reading etc/e820 failed. Fallback to cmos. */
tomk = qemu_get_memory_size(); tomk = qemu_get_memory_size();
high = qemu_get_high_memory_size(); uint64_t high = qemu_get_high_memory_size();
printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM below 4G.\n", tomk / 1024); printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM below 4G.\n", tomk / 1024);
printk(BIOS_DEBUG, "QEMU: cmos: %lu MiB RAM above 4G.\n", high / 1024); printk(BIOS_DEBUG, "QEMU: cmos: %llu MiB RAM above 4G.\n", high / 1024);
/* Report the memory regions. */ /* Report the memory regions. */
ram_resource_kb(dev, idx++, 0, 640); ram_from_to(dev, idx++, 0, 0xa0000);
ram_resource_kb(dev, idx++, 768, tomk - 768); ram_from_to(dev, idx++, 0xc0000, tomk * KiB);
if (high) if (high)
ram_resource_kb(dev, idx++, 4 * 1024 * 1024, high); upper_ram_end(dev, idx++, 4ull * GiB + high * KiB);
} }
/* Reserve I/O ports used by QEMU */ /* Reserve I/O ports used by QEMU */
@ -119,10 +118,10 @@ static void cpu_pci_domain_read_resources(struct device *dev)
} }
/* A segment is legacy VGA region */ /* A segment is legacy VGA region */
mmio_resource_kb(dev, idx++, 0xa0000 / KiB, (0xc0000 - 0xa0000) / KiB); mmio_from_to(dev, idx++, 0xa0000, 0xc0000);
/* C segment to 1MB is reserved RAM (low tables) */ /* C segment to 1MB is reserved RAM (low tables) */
reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, (1 * MiB - 0xc0000) / KiB); reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
if (q35 && ((tomk * 1024) < 0xb0000000)) { if (q35 && ((tomk * 1024) < 0xb0000000)) {
/* /*

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@ -55,12 +55,11 @@ static void qemu_nb_read_resources(struct device *dev)
if (CONFIG(ARCH_RAMSTAGE_X86_64)) { if (CONFIG(ARCH_RAMSTAGE_X86_64)) {
/* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */ /* Reserve page tables in DRAM. FIXME: Remove once x86_64 page tables reside in CBMEM */
reserved_ram_resource_kb(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC / KiB, reserved_ram_range(dev, 0, CONFIG_ARCH_X86_64_PGTBL_LOC, 6 * 0x1000);
(6 * 0x1000) / KiB);
} }
smm_region(&tseg_base, &tseg_size); smm_region(&tseg_base, &tseg_size);
reserved_ram_resource_kb(dev, ESMRAMC, tseg_base / 1024, tseg_size / 1024); reserved_ram_range(dev, ESMRAMC, tseg_base, tseg_size);
} }