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drivers/intel/fsp2_0: Update the debug levels 

Choose appropriate debug levels for the various messages in the FSP
driver.  Change:

* BIOS_DEBUG --> BIOS_SPEW: Normal FSP driver output level, allows
  builder to disable FSP driver output by selecting
  CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7

* BIOS_ERROR --> BIOS_CRIT: These errors will prevent coreboot and the
  payload from successfully booting

TEST=Build and run on Galileo Gen2

Change-Id: Ic3352de2022e16482bf47fc953aedeef8f0c2880
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/16003
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Lee Leahy 2016-07-31 16:49:28 -07:00
parent 94e502be7a
commit b20d4ba57a
3 changed files with 15 additions and 15 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/drivers/intel/fsp2_0/debug.c
View File

@ -32,7 +32,7 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
/* Display the call entry point and paramters */
if (!IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
return;
printk(BIOS_DEBUG, "Calling FspMemoryInit: 0x%p\n", memory_init);
printk(BIOS_SPEW, "Calling FspMemoryInit: 0x%p\n", memory_init);
printk(BIOS_SPEW, "\t0x%p: raminit_upd\n", fspm_new_upd);
printk(BIOS_SPEW, "\t0x%p: &hob_list_ptr\n", fsp_get_hob_list_ptr());
}
@ -40,7 +40,7 @@ void fsp_debug_before_memory_init(fsp_memory_init_fn memory_init,
void fsp_debug_after_memory_init(enum fsp_status status)
{
if (IS_ENABLED(CONFIG_DISPLAY_FSP_CALLS_AND_STATUS))
printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
printk(BIOS_SPEW, "FspMemoryInit returned 0x%08x\n", status);
/* Verify that the HOB list pointer was set */
if (fsp_get_hob_list() == NULL)

18
src/drivers/intel/fsp2_0/memory_init.c
View File

@ -77,7 +77,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
} else if (cbmem_initialize_id_size(CBMEM_ID_FSP_RESERVED_MEMORY,
range_entry_size(&fsp_mem))) {
if (IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)) {
printk(BIOS_DEBUG,
printk(BIOS_ERR,
"Failed to recover CBMEM in S3 resume.\n");
/* Failed S3 resume, reset to come up cleanly */
hard_reset();
@ -100,7 +100,7 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
if (handoff != NULL)
handoff->s3_resume = s3wake;
else
printk(BIOS_DEBUG, "Romstage handoff structure not added!\n");
printk(BIOS_SPEW, "Romstage handoff structure not added!\n");
}
static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake,
@ -115,12 +115,12 @@ static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake,
/* Don't use saved training data when recovery mode is enabled. */
if (vboot_recovery_mode_enabled()) {
printk(BIOS_DEBUG, "Recovery mode. Not using MRC cache.\n");
printk(BIOS_SPEW, "Recovery mode. Not using MRC cache.\n");
return;
}
if (mrc_cache_get_current_with_version(&mrc_cache, fsp_version)) {
printk(BIOS_DEBUG, "MRC cache was not found\n");
printk(BIOS_SPEW, "MRC cache was not found\n");
return;
}
@ -129,7 +129,7 @@ static void fsp_fill_mrc_cache(struct FSPM_ARCH_UPD *arch_upd, bool s3wake,
arch_upd->BootMode = s3wake ?
FSP_BOOT_ON_S3_RESUME:
FSP_BOOT_ASSUMING_NO_CONFIGURATION_CHANGES;
printk(BIOS_DEBUG, "MRC cache found, size %x bootmode:%d\n",
printk(BIOS_SPEW, "MRC cache found, size %x bootmode:%d\n",
mrc_cache->size, arch_upd->BootMode);
}
@ -144,7 +144,7 @@ static enum cb_err check_region_overlap(const struct memranges *ranges,
continue;
if (begin >= range_entry_end(r))
continue;
printk(BIOS_ERR, "'%s' overlaps currently running program: "
printk(BIOS_CRIT, "'%s' overlaps currently running program: "
"[%p, %p)\n", description, (void *)begin, (void *)end);
return CB_ERR;
}
@ -227,7 +227,7 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake,
/* Handle any errors returned by FspMemoryInit */
fsp_handle_reset(status);
if (status != FSP_SUCCESS) {
printk(BIOS_DEBUG, "FspMemoryInit returned 0x%08x\n", status);
printk(BIOS_CRIT, "FspMemoryInit returned 0x%08x\n", status);
die("FspMemoryInit returned an error!\n");
}
@ -270,7 +270,7 @@ static enum cb_err load_fspm_xip(struct fsp_header *hdr,
base = rdev_mmap_full(rdev);
if ((uintptr_t)base != hdr->image_base) {
printk(BIOS_ERR, "FSPM XIP base does not match: %p vs %p\n",
printk(BIOS_CRIT, "FSPM XIP base does not match: %p vs %p\n",
(void *)(uintptr_t)hdr->image_base, base);
return CB_ERR;
}
@ -296,7 +296,7 @@ void fsp_memory_init(bool s3wake)
boot_count_increment();
if (cbfs_boot_locate(&file_desc, name, NULL)) {
printk(BIOS_ERR, "Could not locate %s in CBFS\n", name);
printk(BIOS_CRIT, "Could not locate %s in CBFS\n", name);
die("FSPM not available!\n");
}

8
src/drivers/intel/fsp2_0/util.c
View File

@ -68,13 +68,13 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
membase = rdev_mmap(rdev, FSP_HDR_OFFSET, FSP_HDR_LEN);
if (membase == NULL) {
printk(BIOS_ERR, "Could not mmap() FSP header.\n");
printk(BIOS_CRIT, "Could not mmap() FSP header.\n");
return CB_ERR;
}
if (fsp_identify(hdr, membase) != CB_SUCCESS) {
rdev_munmap(rdev, membase);
printk(BIOS_ERR, "No valid FSP header\n");
printk(BIOS_CRIT, "No valid FSP header\n");
return CB_ERR;
}
@ -85,7 +85,7 @@ enum cb_err fsp_validate_component(struct fsp_header *hdr,
/* Check if size specified in the header matches the cbfs file size */
if (region_device_sz(rdev) < hdr->image_size) {
printk(BIOS_ERR, "Component size bigger than cbfs file.\n");
printk(BIOS_CRIT, "Component size bigger than cbfs file.\n");
return CB_ERR;
}
@ -103,7 +103,7 @@ void fsp_handle_reset(enum fsp_status status)
if (!fsp_reset_requested(status))
return;
printk(BIOS_DEBUG, "FSP: handling reset type %x\n", status);
printk(BIOS_SPEW, "FSP: handling reset type %x\n", status);
switch(status) {
case FSP_STATUS_RESET_REQUIRED_COLD: