mainboard/winnet/g170: Add ACPI support
What is present is APIC and legacy interrupt routing and the soft-off sleep state. Other sleep states are missing, so are the SuperIO devices. Boots Linux with and without "noapic" and a Windows XP (installed with factory BIOS, the installer reportedly requires legacy keyboard). Change-Id: Iee3ede8683d1ea51317228d4f782af27043cc945 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/18901 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -24,6 +24,7 @@ config BOARD_SPECIFIC_OPTIONS
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select SUPERIO_WINBOND_W83697HF
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select HAVE_PIRQ_TABLE
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select HAVE_OPTION_TABLE
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select HAVE_ACPI_TABLES
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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@ -0,0 +1,51 @@
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/*
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* This file is part of the coreboot project.
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*
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* Based on mainboard/via/epia-m700/acpi_tables.c
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*
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* Copyright (C) 2004 Stefan Reinauer <stepan@openbios.org>
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* Copyright (C) 2005 Nick Barker <nick.barker9@btinternet.com>
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* Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
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* Copyright (C) 2017 Lubomir Rintel <lkundrak@v3.sk>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <stdint.h>
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#include <arch/acpi.h>
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#include <arch/ioapic.h>
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#include <arch/smp/mpspec.h>
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#include "southbridge/via/vt8237r/vt8237r.h"
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unsigned long acpi_fill_mcfg(unsigned long current)
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{
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return current;
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}
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unsigned long acpi_fill_madt(unsigned long current)
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{
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/* Create all subtables for processors. */
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current = acpi_create_madt_lapics(current);
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/* Write SB IOAPIC. */
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current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *) current,
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VT8237R_APIC_ID, IO_APIC_ADDR, 0);
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/* IRQ9 ACPI active low. */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 9, 9, MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_LOW);
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/* IRQ0 -> APIC IRQ2. */
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current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *)
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current, 0, 0, 2, 0x0);
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return current;
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}
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@ -0,0 +1,43 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2017 Lubomir Rintel <lkundrak@v3.sk>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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DefinitionBlock(
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"dsdt.aml",
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"DSDT",
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0x02, // DSDT revision: ACPI v2.0
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"COREv4", // OEM id
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"COREBOOT", // OEM table id
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0x20170227 // OEM revision
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)
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{
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/* Sleep states */
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Name (\_S0, Package (0x04) { 0x00, 0x00, 0x00, 0x00 })
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Name (\_S5, Package (0x04) { 0x02, 0x02, 0x02, 0x02 })
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/* Interrupt model */
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Method (_PIC, 1) {
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Store (Arg0, \_SB.PCI0.ISAC.APIC)
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}
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Scope (\_SB) {
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/* PCI bus */
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Device (PCI0) {
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#include <northbridge/via/cn700/acpi/hostbridge.asl>
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#include <southbridge/via/vt8237r/acpi/lpc.asl>
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#include <southbridge/via/vt8237r/acpi/default_irq_route.asl>
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}
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}
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}
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