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src/lib/prog_loaders: Add preload_ramstage 

This will enable preloading ramstage. By preloading the file into
cbfs_cache we reduce boot time.

BUG=b:179699789
TEST=Boot guybrush to OS and see 12ms reduction in boot time.

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ibe12de806449da25bc0033b02fcb97c3384eddc1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58982
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Raul E Rangel 2021-11-05 10:29:24 -06:00 committed by Raul Rangel
parent 571e7f02de
commit b25576fa63
3 changed files with 19 additions and 0 deletions
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4
Makefile.inc
View File

@ -1214,6 +1214,10 @@ cbfs-files-$(CONFIG_HAVE_RAMSTAGE) += $(CONFIG_CBFS_PREFIX)/ramstage
$(CONFIG_CBFS_PREFIX)/ramstage-file := $(RAMSTAGE)
$(CONFIG_CBFS_PREFIX)/ramstage-type := stage
$(CONFIG_CBFS_PREFIX)/ramstage-compression := $(CBFS_COMPRESS_FLAG)
# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
$(CONFIG_CBFS_PREFIX)/ramstage-align := 64
endif
cbfs-files-$(CONFIG_HAVE_REFCODE_BLOB) += $(CONFIG_CBFS_PREFIX)/refcode
$(CONFIG_CBFS_PREFIX)/refcode-file := $(REFCODE_BLOB)

7
src/include/program_loading.h
View File

@ -145,6 +145,13 @@ int legacy_romstage_select_and_load(struct prog *romstage);
* RAMSTAGE LOADING *
************************/
/*
* Asynchronously preloads ramstage.
*
* This should be called early on to allow ramstage to load before
* `run_ramstage` is called.
*/
void preload_ramstage(void);
/* Run ramstage from romstage. */
void run_ramstage(void);

8
src/lib/prog_loaders.c
View File

@ -75,7 +75,15 @@ static int load_relocatable_ramstage(struct prog *ramstage)
return rmodule_stage_load(&rmod_ram);
}
void preload_ramstage(void)
{
if (!CONFIG(CBFS_PRELOAD))
return;
printk(BIOS_DEBUG, "Preloading ramstage\n");
cbfs_preload(CONFIG_CBFS_PREFIX "/ramstage");
}
void run_ramstage(void)
{
struct prog ramstage =