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Unify PCI configuration cycles 

Split PCI IO configuration and MMIO configuration cycles to separate
files. Modern hardware does not use IO cycles for PCI configuration
after initial setup in bootblock.

Note that the pci_mmio_ and pcie_ functions were different in masking
the alignment for register address. PCI standard requires that 16-bit
and 32-bit configuration register writes do not cross boundaries.

Change-Id: Ie6441283e1a033b4b395e972c18c31277f973897
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3554
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Kyösti Mälkki 2013-06-26 08:19:14 +03:00 committed by Stefan Reinauer
parent 33e5df3f25
commit b25a9da6e7
3 changed files with 134 additions and 186 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

183
src/arch/x86/include/arch/io.h
View File

@ -213,188 +213,7 @@ typedef unsigned device_t; /* pci and pci_mmio need to have different ways to ha
* Before that We need to use %gs, and leave %fs to other RAM access * Before that We need to use %gs, and leave %fs to other RAM access
*/ */
static inline __attribute__((always_inline)) uint8_t pci_io_read_config8(device_t dev, unsigned where) #include <arch/pci_io_cfg.h>
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); //seg == 0
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
return inb(0xCFC + (addr & 3));
}
#if CONFIG_MMCONF_SUPPORT
static inline __attribute__((always_inline)) uint8_t pci_mmio_read_config8(device_t dev, unsigned where)
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
return read8(addr);
}
#endif
static inline __attribute__((always_inline)) uint8_t pci_read_config8(device_t dev, unsigned where)
{
#if CONFIG_MMCONF_SUPPORT_DEFAULT
return pci_mmio_read_config8(dev, where);
#else
return pci_io_read_config8(dev, where);
#endif
}
static inline __attribute__((always_inline)) uint16_t pci_io_read_config16(device_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
return inw(0xCFC + (addr & 2));
}
#if CONFIG_MMCONF_SUPPORT
static inline __attribute__((always_inline)) uint16_t pci_mmio_read_config16(device_t dev, unsigned where)
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
return read16(addr);
}
#endif
static inline __attribute__((always_inline)) uint16_t pci_read_config16(device_t dev, unsigned where)
{
#if CONFIG_MMCONF_SUPPORT_DEFAULT
return pci_mmio_read_config16(dev, where);
#else
return pci_io_read_config16(dev, where);
#endif
}
static inline __attribute__((always_inline)) uint32_t pci_io_read_config32(device_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
return inl(0xCFC);
}
#if CONFIG_MMCONF_SUPPORT
static inline __attribute__((always_inline)) uint32_t pci_mmio_read_config32(device_t dev, unsigned where)
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
return read32(addr);
}
#endif
static inline __attribute__((always_inline)) uint32_t pci_read_config32(device_t dev, unsigned where)
{
#if CONFIG_MMCONF_SUPPORT_DEFAULT
return pci_mmio_read_config32(dev, where);
#else
return pci_io_read_config32(dev, where);
#endif
}
static inline __attribute__((always_inline)) void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
outb(value, 0xCFC + (addr & 3));
}
#if CONFIG_MMCONF_SUPPORT
static inline __attribute__((always_inline)) void pci_mmio_write_config8(device_t dev, unsigned where, uint8_t value)
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | where;
write8(addr, value);
}
#endif
static inline __attribute__((always_inline)) void pci_write_config8(device_t dev, unsigned where, uint8_t value)
{
#if CONFIG_MMCONF_SUPPORT_DEFAULT
pci_mmio_write_config8(dev, where, value);
#else
pci_io_write_config8(dev, where, value);
#endif
}
static inline __attribute__((always_inline)) void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
outw(value, 0xCFC + (addr & 2));
}
#if CONFIG_MMCONF_SUPPORT
static inline __attribute__((always_inline)) void pci_mmio_write_config16(device_t dev, unsigned where, uint16_t value)
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~1);
write16(addr, value);
}
#endif
static inline __attribute__((always_inline)) void pci_write_config16(device_t dev, unsigned where, uint16_t value)
{
#if CONFIG_MMCONF_SUPPORT_DEFAULT
pci_mmio_write_config16(dev, where, value);
#else
pci_io_write_config16(dev, where, value);
#endif
}
static inline __attribute__((always_inline)) void pci_io_write_config32(device_t dev, unsigned where, uint32_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
outl(value, 0xCFC);
}
#if CONFIG_MMCONF_SUPPORT
static inline __attribute__((always_inline)) void pci_mmio_write_config32(device_t dev, unsigned where, uint32_t value)
{
unsigned addr;
addr = CONFIG_MMCONF_BASE_ADDRESS | dev | (where & ~3);
write32(addr, value);
}
#endif
static inline __attribute__((always_inline)) void pci_write_config32(device_t dev, unsigned where, uint32_t value)
{
#if CONFIG_MMCONF_SUPPORT_DEFAULT
pci_mmio_write_config32(dev, where, value);
#else
pci_io_write_config32(dev, where, value);
#endif
}
#include <arch/pci_mmio_cfg.h> #include <arch/pci_mmio_cfg.h>
static inline __attribute__((always_inline)) void pci_or_config8(device_t dev, unsigned where, uint8_t value) static inline __attribute__((always_inline)) void pci_or_config8(device_t dev, unsigned where, uint8_t value)

111
src/arch/x86/include/arch/pci_io_cfg.h Normal file
View File

@ -0,0 +1,111 @@
/*
* This file is part of the coreboot project.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _PCI_IO_CFG_H
#define _PCI_IO_CFG_H
#include <arch/io.h>
static inline __attribute__((always_inline))
uint8_t pci_io_read_config8(device_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16); //seg == 0
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
return inb(0xCFC + (addr & 3));
}
static inline __attribute__((always_inline))
uint16_t pci_io_read_config16(device_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
return inw(0xCFC + (addr & 2));
}
static inline __attribute__((always_inline))
uint32_t pci_io_read_config32(device_t dev, unsigned where)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
return inl(0xCFC);
}
static inline __attribute__((always_inline))
void pci_io_write_config8(device_t dev, unsigned where, uint8_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
outb(value, 0xCFC + (addr & 3));
}
static inline __attribute__((always_inline))
void pci_io_write_config16(device_t dev, unsigned where, uint16_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
outw(value, 0xCFC + (addr & 2));
}
static inline __attribute__((always_inline))
void pci_io_write_config32(device_t dev, unsigned where, uint32_t value)
{
unsigned addr;
#if !CONFIG_PCI_IO_CFG_EXT
addr = (dev>>4) | where;
#else
addr = (dev>>4) | (where & 0xff) | ((where & 0xf00)<<16);
#endif
outl(0x80000000 | (addr & ~3), 0xCF8);
outl(value, 0xCFC);
}
#if !CONFIG_MMCONF_SUPPORT_DEFAULT
#define pci_read_config8 pci_io_read_config8
#define pci_read_config16 pci_io_read_config16
#define pci_read_config32 pci_io_read_config32
#define pci_write_config8 pci_io_write_config8
#define pci_write_config16 pci_io_write_config16
#define pci_write_config32 pci_io_write_config32
#endif
#endif /* _PCI_IO_CFG_H */

26
src/arch/x86/include/arch/pci_mmio_cfg.h
View File

@ -37,7 +37,7 @@ static inline __attribute__ ((always_inline))
u16 pcie_read_config16(device_t dev, unsigned int where) u16 pcie_read_config16(device_t dev, unsigned int where)
{ {
unsigned long addr; unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where; addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
return read16(addr); return read16(addr);
} }
@ -45,7 +45,7 @@ static inline __attribute__ ((always_inline))
u32 pcie_read_config32(device_t dev, unsigned int where) u32 pcie_read_config32(device_t dev, unsigned int where)
{ {
unsigned long addr; unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where; addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
return read32(addr); return read32(addr);
} }
@ -61,7 +61,7 @@ static inline __attribute__ ((always_inline))
void pcie_write_config16(device_t dev, unsigned int where, u16 value) void pcie_write_config16(device_t dev, unsigned int where, u16 value)
{ {
unsigned long addr; unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where; addr = DEFAULT_PCIEXBAR | dev | (where & ~1);
write16(addr, value); write16(addr, value);
} }
@ -69,7 +69,7 @@ static inline __attribute__ ((always_inline))
void pcie_write_config32(device_t dev, unsigned int where, u32 value) void pcie_write_config32(device_t dev, unsigned int where, u32 value)
{ {
unsigned long addr; unsigned long addr;
addr = DEFAULT_PCIEXBAR | dev | where; addr = DEFAULT_PCIEXBAR | dev | (where & ~3);
write32(addr, value); write32(addr, value);
} }
@ -94,5 +94,23 @@ void pcie_or_config32(device_t dev, unsigned int where, u32 ormask)
pcie_write_config32(dev, where, value | ormask); pcie_write_config32(dev, where, value | ormask);
} }
#define pci_mmio_read_config8 pcie_read_config8
#define pci_mmio_read_config16 pcie_read_config16
#define pci_mmio_read_config32 pcie_read_config32
#define pci_mmio_write_config8 pcie_write_config8
#define pci_mmio_write_config16 pcie_write_config16
#define pci_mmio_write_config32 pcie_write_config32
#if CONFIG_MMCONF_SUPPORT_DEFAULT
#define pci_read_config8 pcie_read_config8
#define pci_read_config16 pcie_read_config16
#define pci_read_config32 pcie_read_config32
#define pci_write_config8 pcie_write_config8
#define pci_write_config16 pcie_write_config16
#define pci_write_config32 pcie_write_config32
#endif
#endif /* CONFIG_MMCONF_SUPPORT */ #endif /* CONFIG_MMCONF_SUPPORT */
#endif /* _PCI_MMIO_CFG_H */ #endif /* _PCI_MMIO_CFG_H */