GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

sb/amd/x/hudson: Replace hudson_enable_smi_generation() 

Change-Id: I08b2d1af16c247e66bf1a352887b0f9387055225
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2020-06-10 11:13:24 +03:00 committed by Patrick Georgi
parent 0778c86b3b
commit b264c5ce10
6 changed files with 6 additions and 8 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/hp/pavilion_m6_1035dx/mainboard.c
View File

@ -4,6 +4,7 @@
#include <acpi/acpi.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
#include <southbridge/amd/agesa/hudson/smi.h>
@ -21,7 +22,7 @@ static void mainboard_enable(struct device *dev)
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH);
hudson_enable_smi_generation();
global_smi_enable();
if (!acpi_is_wakeup_s3())
pavilion_cold_boot_init();

3
src/mainboard/lenovo/g505s/mainboard.c
View File

@ -4,6 +4,7 @@
#include <acpi/acpi.h>
#include <console/console.h>
#include <cpu/x86/smm.h>
#include <device/device.h>
#include <southbridge/amd/agesa/hudson/smi.h>
@ -21,7 +22,7 @@ static void mainboard_enable(struct device *dev)
printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH);
hudson_enable_smi_generation();
global_smi_enable();
if (!acpi_is_wakeup_s3())
pavilion_cold_boot_init();

2
src/southbridge/amd/agesa/hudson/smi.c
View File

@ -16,7 +16,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
}
/** Set the EOS bit and enable SMI generation from southbridge */
void hudson_enable_smi_generation(void)
void global_smi_enable(void)
{
uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */

2
src/southbridge/amd/agesa/hudson/smi.h
View File

@ -37,6 +37,4 @@ void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
void hudson_disable_gevent_smi(uint8_t gevent);
void hudson_enable_acpi_cmd_smi(void);
void hudson_enable_smi_generation(void);
#endif /* _SOUTHBRIDGE_AMD_AGESA_HUDSON_SMI_H */

2
src/southbridge/amd/pi/hudson/smi.c
View File

@ -16,7 +16,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
}
/** Set the EOS bit and enable SMI generation from southbridge */
void hudson_enable_smi_generation(void)
void global_smi_enable(void)
{
uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */

2
src/southbridge/amd/pi/hudson/smi.h
View File

@ -37,6 +37,4 @@ void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
void hudson_disable_gevent_smi(uint8_t gevent);
void hudson_enable_acpi_cmd_smi(void);
void hudson_enable_smi_generation(void);
#endif /* _SOUTHBRIDGE_AMD_PI_HUDSON_SMI_H */