sb/amd/x/hudson: Replace hudson_enable_smi_generation()

Change-Id: I08b2d1af16c247e66bf1a352887b0f9387055225
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42356
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>

src/mainboard/hp/pavilion_m6_1035dx/mainboard.c

@@ -4,6 +4,7 @@
 
 #include <acpi/acpi.h>
 #include <console/console.h>
+#include <cpu/x86/smm.h>
 #include <device/device.h>
 
 #include <southbridge/amd/agesa/hudson/smi.h>
@@ -21,7 +22,7 @@ static void mainboard_enable(struct device *dev)
 	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
 
 	hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH);
-	hudson_enable_smi_generation();
+	global_smi_enable();
 
 	if (!acpi_is_wakeup_s3())
 		pavilion_cold_boot_init();

src/mainboard/lenovo/g505s/mainboard.c

@@ -4,6 +4,7 @@
 
 #include <acpi/acpi.h>
 #include <console/console.h>
+#include <cpu/x86/smm.h>
 #include <device/device.h>
 
 #include <southbridge/amd/agesa/hudson/smi.h>
@@ -21,7 +22,7 @@ static void mainboard_enable(struct device *dev)
 	printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n");
 
 	hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH);
-	hudson_enable_smi_generation();
+	global_smi_enable();
 
 	if (!acpi_is_wakeup_s3())
 		pavilion_cold_boot_init();

src/southbridge/amd/agesa/hudson/smi.c

@@ -16,7 +16,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
 }
 
 /** Set the EOS bit and enable SMI generation from southbridge */
-void hudson_enable_smi_generation(void)
+void global_smi_enable(void)
 {
 	uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
 	reg &= ~SMITRG0_SMIENB;	/* Enable SMI generation */

src/southbridge/amd/agesa/hudson/smi.h

@@ -37,6 +37,4 @@ void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
 void hudson_disable_gevent_smi(uint8_t gevent);
 void hudson_enable_acpi_cmd_smi(void);
 
-void hudson_enable_smi_generation(void);
-
 #endif /* _SOUTHBRIDGE_AMD_AGESA_HUDSON_SMI_H */

src/southbridge/amd/pi/hudson/smi.c

@@ -16,7 +16,7 @@ void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
 }
 
 /** Set the EOS bit and enable SMI generation from southbridge */
-void hudson_enable_smi_generation(void)
+void global_smi_enable(void)
 {
 	uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
 	reg &= ~SMITRG0_SMIENB;	/* Enable SMI generation */

src/southbridge/amd/pi/hudson/smi.h

@@ -37,6 +37,4 @@ void hudson_configure_gevent_smi(uint8_t gevent, uint8_t mode, uint8_t level);
 void hudson_disable_gevent_smi(uint8_t gevent);
 void hudson_enable_acpi_cmd_smi(void);
 
-void hudson_enable_smi_generation(void);
-
 #endif /* _SOUTHBRIDGE_AMD_PI_HUDSON_SMI_H */