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AMD Steppe Eagle: Add binary PI vendorcode files 

Add all of the PI source that will remain part of coreboot to
build with a binary AGESA PI BLOB.  This includes the gcc
makefiles, some Kconfig, and the AGESA standard library
functions.

Change vendorcode Makefile and Kconfig so that they can compile
AMD library files and use headers from outside the coreboot/src
tree.

The AGESA dispatcher is built using its own rules rather than
generic library generation rules in coreboot/Makefile and
coreboot/Makefile.inc.  The AGESA source files are initially
copied from whereever they live into coreboot/build/agesa.
They are compiled from there.  The binary PI directory has a
mandatory structure that places the AGESA BLOB into the same
directory as the support headers.  These will nominally be
placed in the 3rdparty directory in coreboot.org.

The copy commands that were added to the the vendorcode
Makefile.inc ensure that only one thread will operate on each
source file by using a macro to generate the copy targets.
After the change, each copy target will operate on exactly one
source file.

Due to API issues, coreboot has no way to control the IMC to set up
fan control.  Set a Kconfig flag that removes the ability to install
an IMC BLOB into CBFS.

Change-Id: I050b72a19086aaeba6cb65ce165297b10e3cfc45
Signed-off-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-on: http://review.coreboot.org/6595
Tested-by: build bot (Jenkins)
Reviewed-by: WANG Siyuan <wangsiyuanbuaa@gmail.com>
Reviewed-by: Zheng Bao <zheng.bao@amd.com>
This commit is contained in:
Bruce Griffith 2014-08-10 23:56:45 -06:00
parent 94930e2622
commit b266c6b544
9 changed files with 2072 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
src/vendorcode/Kconfig
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source src/vendorcode/amd/Kconfig
source src/vendorcode/google/Kconfig source src/vendorcode/google/Kconfig
source src/vendorcode/intel/Kconfig source src/vendorcode/intel/Kconfig

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src/vendorcode/amd/Kconfig Normal file
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#
# This file is part of the coreboot project.
#
# Copyright (C) 2013-2014 Sage Electronic Engineering, LLC
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; version 2 of the License.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
if CPU_AMD_AGESA_00730F01
menu "AMD Platform Initialization"
source src/vendorcode/amd/pi/Kconfig
choice
prompt "AGESA source"
depends on CPU_AMD_AGESA
default CPU_AMD_AGESA_BINARY_PI if CPU_AMD_AGESA_00730F01
default CPU_AMD_AGESA_OPENSOURCE
help
Select the method for including the AMD Platform Initialization
code into coreboot. Platform Initialization code is required for
all AMD processors.
config CPU_AMD_AGESA_BINARY_PI
bool "binary PI"
select HUDSON_DISABLE_IMC
help
Use a binary PI package. Generally, these will be stored in the
"3rdparty" directory. For some processors, these must be obtained
directly from AMD Embedded Processors Group
(http://www.amdcom/embedded).
config CPU_AMD_AGESA_OPENSOURCE
bool "open-source AGESA"
help
Build the PI package ("AGESA") from source code in the "vendorcode"
directory.
endchoice
config AGESA_BINARY_PI_PATH_DEFAULT_SELECTED
bool
depends on CPU_AMD_AGESA_BINARY_PI
default n
config AGESA_BINARY_PI_PATH
string "AGESA PI directory path"
depends on CPU_AMD_AGESA_BINARY_PI
default AGESA_BINARY_PI_PATH_DEFAULT if AGESA_BINARY_PI_PATH_DEFAULT_SELECTED
help
Specify where to find the AGESA headers and binary file
for AMD platform initialization.
config AGESA_BINARY_PI_FILE_DEFAULT_SELECTED
bool
depends on CPU_AMD_AGESA_BINARY_PI
default n
config AGESA_BINARY_PI_FILE
string "AGESA PI binary file name"
depends on CPU_AMD_AGESA_BINARY_PI
default AGESA_BINARY_PI_FILE_DEFAULT if AGESA_BINARY_PI_FILE_DEFAULT_SELECTED
help
Specify the binary file to use for AMD platform initialization.
config AGESA_BINARY_PI_LOCATION_DEFAULT_SELECTED
bool
depends on CPU_AMD_AGESA_BINARY_PI
default n
config AGESA_BINARY_PI_LOCATION
string "AGESA PI binary address in ROM"
depends on CPU_AMD_AGESA_BINARY_PI
default AGESA_BINARY_PI_LOCATION_DEFAULT if AGESA_BINARY_PI_FILE_DEFAULT_SELECTED
help
Specify the ROM address at which to store the binary Platform
Initialization code.
endmenu
endif

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src/vendorcode/amd/Makefile.inc
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subdirs-y += pi
subdirs-y += agesa subdirs-y += agesa
subdirs-y += cimx subdirs-y += cimx

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src/vendorcode/amd/pi/00730F01/Kconfig Normal file
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#
# Copyright (c) 2013 - 2014, Sage Electronic Engineering, LLC
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# * Neither the name of Advanced Micro Devices, Inc. nor the names of
# its contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
if CPU_AMD_AGESA_00730F01
config AGESA_BINARY_PI_DEFAULTS # dummy
def_bool y
depends on CPU_AMD_AGESA_00730F01
select AGESA_BINARY_PI_LOCATION_DEFAULT_SELECTED
select AGESA_BINARY_PI_PATH_DEFAULT_SELECTED
select AGESA_BINARY_PI_FILE_DEFAULT_SELECTED
config AGESA_BINARY_PI_PATH_DEFAULT
string
depends on CPU_AMD_AGESA_00730F01
default "3rdparty/pi/amd/00730F01"
help
The default binary file name to use for AMD platform initialization.
config AGESA_BINARY_PI_FILE_DEFAULT
string
depends on CPU_AMD_AGESA_00730F01
default "FT3b/AGESA.bin"
help
The default binary file name to use for AMD platform initialization.
config AGESA_BINARY_PI_LOCATION_DEFAULT
hex
depends on CPU_AMD_AGESA_00730F01
default 0xFFE00000
help
The default ROM address at which to store the binary Platform
Initialization code.
endif

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src/vendorcode/amd/pi/00730F01/Lib/amdlib.c Normal file
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/* $NoKeywords:$ */
/**
* @file
*
* AMD Library
*
* Contains interface to the AMD AGESA library
*
* @xrefitem bom "File Content Label" "Release Content"
* @e project: AGESA
* @e sub-project: Lib
* @e \$Revision: 85030 $ @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $
*
*/
/*
******************************************************************************
*
* Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
* 2013 - 2014, Sage Electronic Engineering, LLC
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
* its contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
******************************************************************************
**/
#ifndef _AMD_LIB_H_
#define _AMD_LIB_H_
#define IOCF8 0xCF8
#define IOCFC 0xCFC
// Reg Values for ReadCpuReg and WriteCpuReg
#define CR4_REG 0x04
#define DR0_REG 0x10
#define DR1_REG 0x11
#define DR2_REG 0x12
#define DR3_REG 0x13
#define DR7_REG 0x17
// PROTOTYPES FOR amdlib32.asm
UINT8
ReadIo8 (
IN UINT16 Address
);
UINT16
ReadIo16 (
IN UINT16 Address
);
UINT32
ReadIo32 (
IN UINT16 Address
);
VOID
WriteIo8 (
IN UINT16 Address,
IN UINT8 Data
);
VOID
WriteIo16 (
IN UINT16 Address,
IN UINT16 Data
);
VOID
WriteIo32 (
IN UINT16 Address,
IN UINT32 Data
);
UINT8
Read64Mem8 (
IN UINT64 Address
);
UINT16
Read64Mem16 (
IN UINT64 Address
);
UINT32
Read64Mem32 (
IN UINT64 Address
);
VOID
Write64Mem8 (
IN UINT64 Address,
IN UINT8 Data
);
VOID
Write64Mem16 (
IN UINT64 Address,
IN UINT16 Data
);
VOID
Write64Mem32 (
IN UINT64 Address,
IN UINT32 Data
);
UINT64
ReadTSC (
void
);
// MSR
VOID
LibAmdMsrRead (
IN UINT32 MsrAddress,
OUT UINT64 *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMsrWrite (
IN UINT32 MsrAddress,
IN UINT64 *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// IO
VOID
LibAmdIoRead (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
OUT VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdIoWrite (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
IN CONST VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdIoRMW (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdIoPoll (
IN ACCESS_WIDTH AccessWidth,
IN UINT16 IoAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN UINT64 Delay,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// Memory or MMIO
VOID
LibAmdMemRead (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
OUT VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemWrite (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
IN CONST VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemRMW (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemPoll (
IN ACCESS_WIDTH AccessWidth,
IN UINT64 MemAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN UINT64 Delay,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// PCI
VOID
LibAmdPciRead (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
OUT VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciWrite (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
IN CONST VOID *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciRMW (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciPoll (
IN ACCESS_WIDTH AccessWidth,
IN PCI_ADDR PciAddress,
IN CONST VOID *Data,
IN CONST VOID *DataMask,
IN UINT64 Delay,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciReadBits (
IN PCI_ADDR Address,
IN UINT8 Highbit,
IN UINT8 Lowbit,
OUT UINT32 *Value,
IN AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciWriteBits (
IN PCI_ADDR Address,
IN UINT8 Highbit,
IN UINT8 Lowbit,
IN CONST UINT32 *Value,
IN AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdPciFindNextCap (
IN OUT PCI_ADDR *Address,
IN AMD_CONFIG_PARAMS *StdHeader
);
// CPUID
VOID
LibAmdCpuidRead (
IN UINT32 CpuidFcnAddress,
OUT CPUID_DATA *Value,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
// Utility Functions
VOID
LibAmdMemFill (
IN VOID *Destination,
IN UINT8 Value,
IN UINTN FillLength,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
VOID
LibAmdMemCopy (
IN VOID *Destination,
IN CONST VOID *Source,
IN UINTN CopyLength,
IN OUT AMD_CONFIG_PARAMS *StdHeader
);
CONST VOID *
LibAmdLocateImage (
IN CONST VOID *StartAddress,
IN CONST VOID *EndAddress,
IN UINT32 Alignment,
IN CONST CHAR8 ModuleSignature[8]
);
UINT32
LibAmdGetPackageType (
IN AMD_CONFIG_PARAMS *StdHeader
);
BOOLEAN
LibAmdVerifyImageChecksum (
IN CONST VOID *ImagePtr
);
UINT8
LibAmdBitScanReverse (
IN UINT32 value
);
UINT8
LibAmdBitScanForward (
IN UINT32 value
);
VOID
LibAmdReadCpuReg (
IN UINT8 RegNum,
OUT UINT32 *Value
);
VOID
LibAmdWriteCpuReg (
IN UINT8 RegNum,
IN UINT32 Value
);
VOID
LibAmdWriteBackInvalidateCache (
void
);
VOID
LibAmdSimNowEnterDebugger (
void
);
VOID
LibAmdHDTBreakPoint (
void
);
UINT8
LibAmdAccessWidth (
IN ACCESS_WIDTH AccessWidth
);
VOID
LibAmdCLFlush (
IN UINT64 Address,
IN UINT8 Count
);
VOID
StopHere (
void
);
VOID
LibAmdFinit (
void
);
VOID
LibAmdFnclex (
void
);
VOID
LibAmdReadMxcsr (
OUT UINT32 *Value
);
VOID
LibAmdWriteMxcsr (
IN UINT32 *Value
);
#endif // _AMD_LIB_H_

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#*****************************************************************************
#
# Copyright (c) 2012, Advanced Micro Devices, Inc.
# 2013 - 2014, Sage Electronic Engineering, LLC
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are met:
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution.
# * Neither the name of Advanced Micro Devices, Inc. nor the names of
# its contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
#*****************************************************************************
# AGESA V5 Files
AGESA_ROOT = $(call strip_quotes,$(src)/../$(CONFIG_AGESA_BINARY_PI_PATH))
AGESA_INC = -I$(obj)
AGESA_INC += -Isrc/mainboard/$(MAINBOARDDIR)
AGESA_INC += -I$(AGESA_ROOT)/binaryPI
AGESA_INC += -I$(AGESA_ROOT)
AGESA_INC += -I$(AGESA_ROOT)/Include
AGESA_INC += -I$(src)/vendorcode/amd/pi/00730F01
AGESA_INC += -I$(src)/vendorcode/amd/pi/00730F01/Lib
AGESA_INC += -I$(AGESA_ROOT)/Proc
AGESA_INC += -I$(AGESA_ROOT)/Proc/Common
AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU
AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Family
AGESA_INC += -I$(AGESA_ROOT)/Proc/CPU/Feature
AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch
AGESA_INC += -I$(AGESA_ROOT)/Proc/Fch/Common
AGESA_INC += -I$(src)/southbridge/amd/agesa/hudson
AGESA_INC += -Isrc/arch/x86/include
AGESA_INC += -Isrc/include
CFLAGS_x86_32 += -march=amdfam10 -mno-3dnow -fno-zero-initialized-in-bss -fno-strict-aliasing
export AGESA_ROOT := $(AGESA_ROOT)
export AGESA_INC := $(AGESA_INC)
export AGESA_CFLAGS := $(AGESA_CFLAGS)
CC_bootblock := $(CC_bootblock) $(AGESA_INC) $(AGESA_CFLAGS)
CC_romstage := $(CC_romstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_ramstage := $(CC_ramstage) $(AGESA_INC) $(AGESA_CFLAGS)
CC_x86_32 := $(CC_x86_32) $(AGESA_INC) $(AGESA_CFLAGS)
#######################################################################
define create_agesa_cp_template
# $1 AGESA source file
# $2 AGESA copy-to location
$(agesa_obj_path)/$1: $2
@printf " AGESA Copying $$(notdir $$(@F)) => $$(@D)\n"
cp -pf $$? $$(@D)
libAgesa.$1: $(agesa_obj_path) $(agesa_obj_path)/$1
endef
agesa_raw_files += $(wildcard $(src)/vendorcode/amd/pi/00730F01/Lib/*.[cS])
agesa_raw_files += $(wildcard $(AGESA_ROOT)/binaryPI/*.[cS])
classes-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += libagesa
$(eval $(call create_class_compiler,libagesa,x86_32))
agesa_src_files := $(strip $(sort $(foreach file,$(strip $(agesa_raw_files)),$(call strip_quotes,$(file)))))
agesa_obj_path := $(strip $(obj)/agesa)
agesa_src_copies := $(strip $(foreach file,$(agesa_src_files),$(agesa_obj_path)/$(notdir $(file))))
agesa_obj_copies := $(strip $(agesa_src_copies:.c=.libagesa.o))
$(agesa_obj_path):
mkdir $@
$(foreach file,$(strip $(agesa_src_files)),$(eval $(call create_agesa_cp_template,$(notdir $(file)),$(file))))
$(agesa_obj_path)/%.libagesa.o: libAgesa.%.c
@printf " CC $(subst $(agesa_obj_path)/,,$(@))\n"
$(CC_libagesa) -MMD $(CFLAGS_libagesa) $(AGESA_INC) -c -o $@ $(agesa_obj_path)/$*.c
$(obj)/agesa/libagesa.00730F01.a: $(agesa_obj_copies)
@printf " AGESA $(subst $(agesa_obj_path)/,,$(@))\n"
ar rcs $@ $+
romstage-libs += $(obj)/agesa/libagesa.00730F01.a
ramstage-libs += $(obj)/agesa/libagesa.00730F01.a
#######################################################################
cbfs-files-$(CONFIG_CPU_AMD_AGESA_BINARY_PI) += AGESA
AGESA-file := $(CONFIG_AGESA_BINARY_PI_PATH)/$(CONFIG_AGESA_BINARY_PI_FILE)
AGESA-type := raw
AGESA-position := $(CONFIG_AGESA_BINARY_PI_LOCATION)

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source src/vendorcode/amd/pi/00730F01/Kconfig

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subdirs-$(CONFIG_CPU_AMD_AGESA_00730F01) += 00730F01