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mb/google/dedede/var/corori: Configure thermal sensor setting 

According to schematics, TSR2 thermal sensor is not present in corori.

BUG=b:197281317
BRANCH=keeby
TEST=FW_NAME="corori" emerge-keeby coreboot

Signed-off-by: Ian Feng <ian_feng@compal.corp-partner.google.com>
Change-Id: Id69f9d6ace738ef1e792addd782d05c2d03d2b3a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57110
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Shou-Chieh Hsu <shouchieh@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Ian Feng 2021-08-24 13:49:24 +08:00 committed by Felix Held
parent aed85c0757
commit b26e613bed
1 changed files with 36 additions and 0 deletions
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36
src/mainboard/google/dedede/variants/corori/overridetree.cb
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@ -41,6 +41,42 @@ chip soc/intel/jasperlake
register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0" register "SerialIoGSpiCsMode[PchSerialIoIndexGSPI0]" = "0"
device domain 0 on device domain 0 on
device pci 04.0 on
chip drivers/intel/dptf
## Passive Policy
register "policies.passive" = "{
[0] = DPTF_PASSIVE(CPU, CPU, 90, 10000),
[1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 60000),
[2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 55, 15000)
}"
## Critical Policy
register "policies.critical" = "{
[0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
[1] = DPTF_CRITICAL(TEMP_SENSOR_0, 90, SHUTDOWN),
[2] = DPTF_CRITICAL(TEMP_SENSOR_1, 80, SHUTDOWN)
}"
## Power Limits Control
register "controls.power_limits" = "{
.pl1 = {
.min_power = 3000,
.max_power = 6000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 200,
},
.pl2 = {
.min_power = 20000,
.max_power = 20000,
.time_window_min = 1 * MSECS_PER_SEC,
.time_window_max = 1 * MSECS_PER_SEC,
.granularity = 1000,
}
}"
device generic 0 on end
end
end # SA Thermal device
device pci 14.0 on device pci 14.0 on
chip drivers/usb/acpi chip drivers/usb/acpi
device usb 0.0 on device usb 0.0 on