mb/google/brya/var/vell: Fix PLD group order
In ec/google/chromeec: Add PLD to EC conn in ACPI table
(667471b8d8
), PLD is added to ACPI table.
This patch ensures USB _PLD group numbers are appear in order.
BUG=b:216490477
TEST=build coreboot and system boot into OS.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ib0d1be34775c5eacf6cd9b0ec400bd42a93c59e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62034
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
parent
df533e6911
commit
b29d128023
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@ -381,7 +381,7 @@ chip soc/intel/alderlake
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chip drivers/usb/acpi
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C3 (DB)""
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register "desc" = ""USB3 Type-C Port C3 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(5, 1)"
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register "group" = "ACPI_PLD_GROUP(4, 1)"
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device ref tcss_usb3_port4 on end
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device ref tcss_usb3_port4 on end
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end
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end
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end
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end
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@ -416,7 +416,7 @@ chip soc/intel/alderlake
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chip drivers/usb/acpi
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C3 (DB)""
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register "desc" = ""USB2 Type-C Port C3 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "group" = "ACPI_PLD_GROUP(5, 1)"
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register "group" = "ACPI_PLD_GROUP(4, 1)"
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device ref usb2_port5 on end
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device ref usb2_port5 on end
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end
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end
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chip drivers/usb/acpi
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chip drivers/usb/acpi
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