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soc/amd/*/root_complex.c: Use newer function for resource declarations 

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: If2048c9cade731b2e4464d0670e0578f5f4bcea0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76291
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Arthur Heymans 2023-07-05 12:15:51 +02:00 committed by Felix Held
parent 885efa1102
commit b2de1a3368
5 changed files with 40 additions and 55 deletions
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19
src/soc/amd/cezanne/root_complex.c
View File

@ -120,28 +120,25 @@ static void read_resources(struct device *dev)
fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 - 0x9ffff */
ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);
ram_range(dev, idx++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_resource_kb(dev, idx++, VGA_MMIO_BASE / KiB, VGA_MMIO_SIZE / KiB);
mmio_range(dev, idx++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB);
reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_resource_kb(dev, idx++, (1 * MiB) / KiB,
(early_reserved_dram_start - (1 * MiB)) / KiB);
ram_from_to(dev, idx++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_resource_kb(dev, idx++, early_reserved_dram_start / KiB,
(early_reserved_dram_end - early_reserved_dram_start) / KiB);
reserved_ram_from_to(dev, idx++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_resource_kb(dev, idx++, early_reserved_dram_end / KiB,
(mem_usable - early_reserved_dram_end) / KiB);
ram_from_to(dev, idx++, early_reserved_dram_end, mem_usable);
mmconf_resource(dev, idx++);
@ -164,9 +161,9 @@ static void read_resources(struct device *dev)
continue; /* Done separately */
if (res->type == EFI_RESOURCE_SYSTEM_MEMORY)
ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
ram_range(dev, idx++, res->addr, res->length);
else if (res->type == EFI_RESOURCE_MEMORY_RESERVED)
reserved_ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
reserved_ram_range(dev, idx++, res->addr, res->length);
else
printk(BIOS_ERR, "failed to set resources for type %d\n",
res->type);

19
src/soc/amd/glinda/root_complex.c
View File

@ -135,28 +135,25 @@ static void read_resources(struct device *dev)
fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 - 0x9ffff */
ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);
ram_range(dev, idx++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_resource_kb(dev, idx++, VGA_MMIO_BASE / KiB, VGA_MMIO_SIZE / KiB);
mmio_range(dev, idx++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB);
reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_resource_kb(dev, idx++, (1 * MiB) / KiB,
(early_reserved_dram_start - (1 * MiB)) / KiB);
ram_from_to(dev, idx++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_resource_kb(dev, idx++, early_reserved_dram_start / KiB,
(early_reserved_dram_end - early_reserved_dram_start) / KiB);
reserved_ram_from_to(dev, idx++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_resource_kb(dev, idx++, early_reserved_dram_end / KiB,
(mem_usable - early_reserved_dram_end) / KiB);
ram_from_to(dev, idx++, early_reserved_dram_end, mem_usable);
mmconf_resource(dev, idx++);
@ -179,9 +176,9 @@ static void read_resources(struct device *dev)
continue; /* Done separately */
if (res->type == EFI_RESOURCE_SYSTEM_MEMORY)
ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
ram_range(dev, idx++, res->addr, res->length);
else if (res->type == EFI_RESOURCE_MEMORY_RESERVED)
reserved_ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
reserved_ram_range(dev, idx++, res->addr, res->length);
else
printk(BIOS_ERR, "Failed to set resources for type %d\n",
res->type);

19
src/soc/amd/mendocino/root_complex.c
View File

@ -163,28 +163,25 @@ static void read_resources(struct device *dev)
fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 - 0x9ffff */
ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);
ram_range(dev, idx++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_resource_kb(dev, idx++, VGA_MMIO_BASE / KiB, VGA_MMIO_SIZE / KiB);
mmio_range(dev, idx++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB);
reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_resource_kb(dev, idx++, (1 * MiB) / KiB,
(early_reserved_dram_start - (1 * MiB)) / KiB);
ram_from_to(dev, idx++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_resource_kb(dev, idx++, early_reserved_dram_start / KiB,
(early_reserved_dram_end - early_reserved_dram_start) / KiB);
reserved_ram_from_to(dev, idx++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_resource_kb(dev, idx++, early_reserved_dram_end / KiB,
(mem_usable - early_reserved_dram_end) / KiB);
ram_from_to(dev, idx++, early_reserved_dram_end, mem_usable);
mmconf_resource(dev, idx++);
@ -207,9 +204,9 @@ static void read_resources(struct device *dev)
continue; /* Done separately */
if (res->type == EFI_RESOURCE_SYSTEM_MEMORY)
ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
ram_range(dev, idx++, res->addr, res->length);
else if (res->type == EFI_RESOURCE_MEMORY_RESERVED)
reserved_ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
reserved_ram_range(dev, idx++, res->addr, res->length);
else
printk(BIOS_ERR, "Failed to set resources for type %d\n",
res->type);

19
src/soc/amd/phoenix/root_complex.c
View File

@ -135,28 +135,25 @@ static void read_resources(struct device *dev)
fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 - 0x9ffff */
ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);
ram_range(dev, idx++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_resource_kb(dev, idx++, VGA_MMIO_BASE / KiB, VGA_MMIO_SIZE / KiB);
mmio_range(dev, idx++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB);
reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
/* 1MiB - bottom of DRAM reserved for early coreboot usage */
ram_resource_kb(dev, idx++, (1 * MiB) / KiB,
(early_reserved_dram_start - (1 * MiB)) / KiB);
ram_from_to(dev, idx++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_resource_kb(dev, idx++, early_reserved_dram_start / KiB,
(early_reserved_dram_end - early_reserved_dram_start) / KiB);
reserved_ram_from_to(dev, idx++, early_reserved_dram_start, early_reserved_dram_end);
/*
* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used.
*/
ram_resource_kb(dev, idx++, early_reserved_dram_end / KiB,
(mem_usable - early_reserved_dram_end) / KiB);
ram_from_to(dev, idx++, early_reserved_dram_end, mem_usable);
mmconf_resource(dev, idx++);
@ -179,9 +176,9 @@ static void read_resources(struct device *dev)
continue; /* Done separately */
if (res->type == EFI_RESOURCE_SYSTEM_MEMORY)
ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
ram_range(dev, idx++, res->addr, res->length);
else if (res->type == EFI_RESOURCE_MEMORY_RESERVED)
reserved_ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
reserved_ram_range(dev, idx++, res->addr, res->length);
else
printk(BIOS_ERR, "Failed to set resources for type %d\n",
res->type);

19
src/soc/amd/picasso/root_complex.c
View File

@ -120,26 +120,23 @@ static void read_resources(struct device *dev)
fixed_io_range_reserved(dev, idx++, PCI_IO_CONFIG_INDEX, PCI_IO_CONFIG_PORT_COUNT);
/* 0x0 - 0x9ffff */
ram_resource_kb(dev, idx++, 0, 0xa0000 / KiB);
ram_range(dev, idx++, 0, 0xa0000);
/* 0xa0000 - 0xbffff: legacy VGA */
mmio_resource_kb(dev, idx++, VGA_MMIO_BASE / KiB, VGA_MMIO_SIZE / KiB);
mmio_range(dev, idx++, VGA_MMIO_BASE, VGA_MMIO_SIZE);
/* 0xc0000 - 0xfffff: Option ROM */
reserved_ram_resource_kb(dev, idx++, 0xc0000 / KiB, 0x40000 / KiB);
reserved_ram_from_to(dev, idx++, 0xc0000, 1 * MiB);
/* 1MB - bottom of DRAM reserved for early coreboot usage */
ram_resource_kb(dev, idx++, (1 * MiB) / KiB,
(early_reserved_dram_start - (1 * MiB)) / KiB);
ram_from_to(dev, idx++, 1 * MiB, early_reserved_dram_start);
/* DRAM reserved for early coreboot usage */
reserved_ram_resource_kb(dev, idx++, early_reserved_dram_start / KiB,
(early_reserved_dram_end - early_reserved_dram_start) / KiB);
reserved_ram_from_to(dev, idx++, early_reserved_dram_start, early_reserved_dram_end);
/* top of DRAM consumed early - low top usable RAM
* cbmem_top() accounts for low UMA and TSEG if they are used. */
ram_resource_kb(dev, idx++, early_reserved_dram_end / KiB,
(mem_usable - early_reserved_dram_end) / KiB);
ram_from_to(dev, idx++, early_reserved_dram_end, mem_usable);
mmconf_resource(dev, idx++);
@ -161,9 +158,9 @@ static void read_resources(struct device *dev)
continue; /* Done separately */
if (res->type == EFI_RESOURCE_SYSTEM_MEMORY)
ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
ram_range(dev, idx++, res->addr, res->length);
else if (res->type == EFI_RESOURCE_MEMORY_RESERVED)
reserved_ram_resource_kb(dev, idx++, res->addr / KiB, res->length / KiB);
reserved_ram_range(dev, idx++, res->addr, res->length);
else
printk(BIOS_ERR, "failed to set resources for type %d\n",
res->type);