mb/google/nissa: Set half_populated true

Alder Lake N has single memory controller with 64-bit bus width. Alder
Lake common meminit block driver considers bus width to be 128-bit and
populates the meminit data accordingly. By setting half_populated to
true, only the bottom half is populated.

Ideally, half_populated is used in platforms with multiple channels to
enable only one half of the channel. Alder Lake N has single channel,
and it would require for new structures to be defined in meminit block
driver for LPx memory configurations. In order to avoid adding new
structures, set half_populated to true. This has the same effect as
having single channel with 64-bit width.

Change-Id: I414e5dc82caf47b6b96c474b3ef6e01c2ce0226e
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61764
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
Reviewed-by: Kangheui Won <khwon@chromium.org>

src/mainboard/google/brya/variants/baseboard/nissa/memory.c

@@ -97,8 +97,15 @@ int __weak variant_memory_sku(void)
 
 bool __weak variant_is_half_populated(void)
 {
-	/* ADL-N only has a single memory channel. */
+	/*
-	return false;
+	 * Ideally half_populated is used in platforms with multiple channels to
+	 * enable only one half of the channel. Alder Lake N has single channel,
+	 * and it would require for new structures to be defined in meminit block
+	 * driver for LPx memory configurations. In order to avoid adding new
+	 * structures, set half_populated to true. This has the same effect as
+	 * having single channel with 64-bit width.
+	*/
+	return true;
 }
 
 void __weak variant_get_spd_info(struct mem_spd *spd_info)