soc/amd/genoa: Hook up BERT

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Change-Id: Ie21bf8d436de19c23ae2176bf8d061564cd5b9cb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76535
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
This commit is contained in:
Arthur Heymans 2023-07-15 00:28:31 +02:00 committed by Felix Held
parent b499c1f014
commit b2ea2f29b8
1 changed files with 16 additions and 0 deletions

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@ -193,4 +193,20 @@ config ACPI_SSDT_PSD_INDEPENDENT
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
config ACPI_BERT
bool "Build ACPI BERT Table"
default y
depends on HAVE_ACPI_TABLES
help
Report Machine Check errors identified in POST to the OS in an
ACPI Boot Error Record Table.
config ACPI_BERT_SIZE
hex
default 0x4000 if ACPI_BERT
default 0x0
help
Specify the amount of DRAM reserved for gathering the data used to
generate the ACPI table.
endif # SOC_AMD_GENOA