soc/amd/genoa: Hook up BERT
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Change-Id: Ie21bf8d436de19c23ae2176bf8d061564cd5b9cb Reviewed-on: https://review.coreboot.org/c/coreboot/+/76535 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
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@ -193,4 +193,20 @@ config ACPI_SSDT_PSD_INDEPENDENT
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cores to transition between p-states independently. A vendor may
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choose to generate _PSD object to allow cores to transition together.
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config ACPI_BERT
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bool "Build ACPI BERT Table"
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default y
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depends on HAVE_ACPI_TABLES
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help
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Report Machine Check errors identified in POST to the OS in an
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ACPI Boot Error Record Table.
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config ACPI_BERT_SIZE
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hex
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default 0x4000 if ACPI_BERT
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default 0x0
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help
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Specify the amount of DRAM reserved for gathering the data used to
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generate the ACPI table.
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endif # SOC_AMD_GENOA
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