diff --git a/configs/builder/config.intel.crb.ac b/configs/builder/config.intel.crb.ac
new file mode 100644
index 0000000000..d2db58dd0d
--- /dev/null
+++ b/configs/builder/config.intel.crb.ac
@@ -0,0 +1,23 @@
+# Intel ArcherCity CRB is a dual socket CRB based on Intel
+# Sapphire Rapids Scalable Processor (SPR-SP) chipset.
+#
+# Type this in coreboot root directory to get a working .config:
+#   make defconfig KBUILD_DEFCONFIG=configs/builder/config.intel.crb.ac
+
+CONFIG_VENDOR_INTEL=y
+CONFIG_BOARD_INTEL_ARCHERCITY_CRB=y
+CONFIG_HAVE_IFD_BIN=y
+CONFIG_LINUX_COMMAND_LINE="loglevel=7 earlyprintk=serial,ttyS0,115200 console=ttyS0,115200"
+CONFIG_PAYLOAD_LINUX=y
+CONFIG_PAYLOAD_FILE="site-local/archercity/linuxboot_bzImage"
+CONFIG_HAVE_ME_BIN=y
+CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION=y
+CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_FSP_T_FILE="site-local/archercity/Server_T.fd"
+CONFIG_FSP_M_FILE="site-local/archercity/Server_M.fd"
+CONFIG_FSP_S_FILE="site-local/archercity/Server_S.fd"
+CONFIG_IFD_BIN_PATH="site-local/archercity/descriptor.bin"
+CONFIG_ME_BIN_PATH="site-local/archercity/me.bin"
+CONFIG_CPU_UCODE_BINARIES="site-local/archercity/mbf806f8.mcb"
+CONFIG_VALIDATE_INTEL_DESCRIPTOR=y