cpu/amd: Move model_10xxx to family_10h-family_15h

Change-Id: I34501d3fc68b71db7781dad11d5b883868932a60
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11965
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/cpu/amd/Kconfig

@@ -12,7 +12,7 @@ source src/cpu/amd/socket_F_1207/Kconfig
 source src/cpu/amd/socket_S1G1/Kconfig
 
 source src/cpu/amd/model_fxx/Kconfig
-source src/cpu/amd/model_10xxx/Kconfig
+source src/cpu/amd/family_10h-family_15h/Kconfig
 source src/cpu/amd/geode_gx2/Kconfig
 source src/cpu/amd/geode_lx/Kconfig
 

src/cpu/amd/socket_AM2r2/Makefile.inc

@@ -1,4 +1,4 @@
-subdirs-y += ../model_10xxx
+subdirs-y += ../family_10h-family_15h
 subdirs-y += ../quadcore
 subdirs-y += ../mtrr
 subdirs-y += ../microcode

src/cpu/amd/socket_AM3/Makefile.inc

@@ -1,4 +1,4 @@
-subdirs-y += ../model_10xxx
+subdirs-y += ../family_10h-family_15h
 subdirs-y += ../quadcore
 subdirs-y += ../mtrr
 subdirs-y += ../microcode

src/cpu/amd/socket_ASB2/Makefile.inc

@@ -1,4 +1,4 @@
-subdirs-y += ../model_10xxx
+subdirs-y += ../family_10h-family_15h
 subdirs-y += ../quadcore
 subdirs-y += ../mtrr
 subdirs-y += ../microcode

src/cpu/amd/socket_C32/Makefile.inc

@@ -1,4 +1,4 @@
-subdirs-y += ../model_10xxx
+subdirs-y += ../family_10h-family_15h
 subdirs-y += ../quadcore
 subdirs-y += ../mtrr
 subdirs-y += ../microcode

src/cpu/amd/socket_F_1207/Makefile.inc

@@ -1,4 +1,4 @@
-subdirs-y += ../model_10xxx
+subdirs-y += ../family_10h-family_15h
 subdirs-y += ../quadcore
 subdirs-y += ../mtrr
 subdirs-y += ../microcode

src/cpu/amd/socket_G34/Makefile.inc

@@ -1,5 +1,5 @@
 ramstage-y += socket_G34.c
-subdirs-y += ../model_10xxx
+subdirs-y += ../family_10h-family_15h
 subdirs-y += ../quadcore
 subdirs-y += ../mtrr
 subdirs-y += ../microcode

src/mainboard/advansus/a785e-i/romstage.c

@@ -64,7 +64,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include "spd.h"
 #include <reset.h>

src/mainboard/amd/bimini_fam10/romstage.c

@@ -61,7 +61,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

src/mainboard/amd/mahogany_fam10/romstage.c

@@ -64,7 +64,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)

src/mainboard/amd/serengeti_cheetah_fam10/romstage.c

@@ -83,7 +83,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 static const u8 spd_addr[] = {

src/mainboard/amd/tilapia_fam10/romstage.c

@@ -63,7 +63,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/asus/kfsn4-dre/romstage.c

@@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/nvidia/ck804/early_setup_car.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 #define GPIO3_DEV PNP_DEV(0x2e, W83627THG_GPIO3)

src/mainboard/asus/kgpe-d16/romstage.c

@@ -62,7 +62,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 /*

src/mainboard/asus/m4a78-em/romstage.c

@@ -64,7 +64,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/asus/m4a785-m/romstage.c

@@ -64,7 +64,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/asus/m5a88-v/romstage.c

@@ -62,7 +62,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include "spd.h"
 #include <reset.h>

src/mainboard/avalue/eax-785e/romstage.c

@@ -65,7 +65,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include "spd.h"
 #include <reset.h>

src/mainboard/gigabyte/ma785gm/romstage.c

@@ -60,7 +60,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/gigabyte/ma785gmt/romstage.c

@@ -60,7 +60,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/gigabyte/ma78gm/romstage.c

@@ -64,7 +64,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/hp/dl165_g6_fam10/romstage.c

@@ -74,7 +74,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 static const u8 spd_addr[] = {

src/mainboard/iei/kino-780am2-fam10/romstage.c

@@ -63,7 +63,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/jetway/pa78vm5/romstage.c

@@ -68,7 +68,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/msi/ms9652_fam10/romstage.c

@@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/nvidia/mcp55/early_setup_car.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 static void sio_setup(void)

src/mainboard/supermicro/h8dmr_fam10/romstage.c

@@ -62,7 +62,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/nvidia/mcp55/early_setup_car.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 static void sio_setup(void)

src/mainboard/supermicro/h8qme_fam10/romstage.c

@@ -69,7 +69,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/nvidia/mcp55/early_setup_car.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 static void sio_setup(void)

src/mainboard/supermicro/h8scm_fam10/romstage.c

@@ -61,7 +61,7 @@ static int spd_read_byte(u32 device, u32 address)
 #include "resourcemap.c"
 #include "cpu/amd/quadcore/quadcore.c"
 #include <cpu/amd/microcode.h>
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 #include <spd.h>
 

src/mainboard/tyan/s2912_fam10/romstage.c

@@ -70,7 +70,7 @@ static inline int spd_read_byte(unsigned device, unsigned address)
 #include "southbridge/nvidia/mcp55/early_setup_car.c"
 #include <cpu/amd/microcode.h>
 
-#include "cpu/amd/model_10xxx/init_cpus.c"
+#include "cpu/amd/family_10h-family_15h/init_cpus.c"
 #include "northbridge/amd/amdfam10/early_ht.c"
 
 static void sio_setup(void)

src/northbridge/amd/amdfam10/northbridge.c

@@ -30,7 +30,7 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/amd/mtrr.h>
 #include <cpu/amd/amdfam10_sysconf.h>
-#include <cpu/amd/model_10xxx/ram_calc.h>
+#include <cpu/amd/family_10h-family_15h/ram_calc.h>
 
 #if CONFIG_LOGICAL_CPUS
 #include <cpu/amd/multicore.h>