amdfam10 boards: Drop array bus_sp5100
Only bus_sp5100[0] is evaluated. Change-Id: I42a5040ea70a84fb674f2c616c6eba7b23dcdc29 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30645 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
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@ -25,7 +25,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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* and acpi_tables busnum is default.
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*/
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*/
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u8 bus_sp5100[2];
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u32 apicid_sp5100;
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u32 apicid_sp5100;
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/*
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/*
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@ -50,7 +49,6 @@ u32 hcdnx[] = {
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void get_bus_conf(void)
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void get_bus_conf(void)
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{
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{
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u32 apicid_base;
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u32 apicid_base;
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struct device *dev;
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int i;
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int i;
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sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
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sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
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@ -63,17 +61,7 @@ void get_bus_conf(void)
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sysconf.sbdn = (sysconf.hcdn[0] & 0xff);
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sysconf.sbdn = (sysconf.hcdn[0] & 0xff);
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for (i = 0; i < 2; i++) {
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pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff;
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bus_sp5100[i] = 0;
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}
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bus_sp5100[0] = (sysconf.pci1234[0] >> 16) & 0xff;
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/* sp5100 */
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dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(0x14, 4));
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if (dev) {
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bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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}
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/* I/O APICs: APIC ID Version State Address */
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/* I/O APICs: APIC ID Version State Address */
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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@ -60,7 +60,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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pirq_info->rfu = rfu;
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}
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}
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extern u8 bus_sp5100[2];
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unsigned long write_pirq_routing_table(unsigned long addr)
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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{
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@ -86,7 +85,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
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pirq->version = PIRQ_VERSION;
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pirq->version = PIRQ_VERSION;
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/* Where the interrupt router resides */
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/* Where the interrupt router resides */
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pirq->rtr_bus = bus_sp5100[0];
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pirq->rtr_bus = pirq_router_bus;
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pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
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pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
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pirq->exclusive_irqs = 0;
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pirq->exclusive_irqs = 0;
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@ -102,7 +101,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
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slot_num = 0;
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slot_num = 0;
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/* pci bridge */
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/* pci bridge */
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write_pirq_info(pirq_info, bus_sp5100[0],
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write_pirq_info(pirq_info, pirq_router_bus,
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PCI_DEVFN(0x14, 4), LNKA, IRQBM, LNKB,
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PCI_DEVFN(0x14, 4), LNKA, IRQBM, LNKB,
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IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
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IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
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pirq_info++;
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pirq_info++;
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@ -21,8 +21,6 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern u8 bus_sp5100[2];
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extern u32 apicid_sp5100;
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extern u32 apicid_sp5100;
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@ -25,7 +25,6 @@
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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/* Global variables for MB layouts and these will be shared by irqtable mptable
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* and acpi_tables busnum is default.
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* and acpi_tables busnum is default.
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*/
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*/
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u8 bus_sp5100[2];
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u32 apicid_sp5100;
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u32 apicid_sp5100;
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/*
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/*
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@ -50,7 +49,6 @@ u32 hcdnx[] = {
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void get_bus_conf(void)
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void get_bus_conf(void)
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{
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{
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u32 apicid_base;
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u32 apicid_base;
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struct device *dev;
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int i;
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int i;
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sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
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sysconf.hc_possible_num = ARRAY_SIZE(pci1234x);
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@ -63,17 +61,7 @@ void get_bus_conf(void)
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sysconf.sbdn = (sysconf.hcdn[0] & 0xff);
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sysconf.sbdn = (sysconf.hcdn[0] & 0xff);
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for (i = 0; i < 2; i++) {
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pirq_router_bus = (sysconf.pci1234[0] >> 16) & 0xff;
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bus_sp5100[i] = 0;
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}
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bus_sp5100[0] = (sysconf.pci1234[0] >> 16) & 0xff;
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/* sp5100 */
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dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(0x14, 4));
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if (dev) {
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bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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}
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/* I/O APICs: APIC ID Version State Address */
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/* I/O APICs: APIC ID Version State Address */
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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if (IS_ENABLED(CONFIG_LOGICAL_CPUS))
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@ -60,8 +60,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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pirq_info->rfu = rfu;
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}
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}
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extern u8 bus_sp5100[2];
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unsigned long write_pirq_routing_table(unsigned long addr)
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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{
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struct irq_routing_table *pirq;
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struct irq_routing_table *pirq;
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@ -86,7 +84,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
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pirq->version = PIRQ_VERSION;
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pirq->version = PIRQ_VERSION;
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/* Where the interrupt router resides */
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/* Where the interrupt router resides */
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pirq->rtr_bus = bus_sp5100[0];
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pirq->rtr_bus = pirq_router_bus;
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pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
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pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
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pirq->exclusive_irqs = 0;
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pirq->exclusive_irqs = 0;
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@ -102,7 +100,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
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slot_num = 0;
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slot_num = 0;
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/* pci bridge */
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/* pci bridge */
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write_pirq_info(pirq_info, bus_sp5100[0],
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write_pirq_info(pirq_info, pirq_router_bus,
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PCI_DEVFN(0x14, 4), LNKA, IRQBM, LNKB,
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PCI_DEVFN(0x14, 4), LNKA, IRQBM, LNKB,
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IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
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IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0);
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pirq_info++;
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pirq_info++;
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@ -21,8 +21,6 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern u8 bus_sp5100[2];
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extern u32 apicid_sp5100;
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extern u32 apicid_sp5100;
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@ -25,7 +25,6 @@
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* and acpi_tables busnum is default.
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* and acpi_tables busnum is default.
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*/
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*/
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u8 bus_sr5650[14];
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u8 bus_sr5650[14];
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u8 bus_sp5100[2];
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u32 apicid_sp5100;
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u32 apicid_sp5100;
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/*
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/*
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@ -63,23 +62,13 @@ void get_bus_conf(void)
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sysconf.sbdn = (sysconf.hcdn[0] & 0xff);
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sysconf.sbdn = (sysconf.hcdn[0] & 0xff);
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for (i = 0; i < 2; i++) {
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bus_sp5100[i] = 0;
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}
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for (i = 0; i < ARRAY_SIZE(bus_sr5650); i++) {
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for (i = 0; i < ARRAY_SIZE(bus_sr5650); i++) {
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bus_sr5650[i] = 0;
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bus_sr5650[i] = 0;
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}
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}
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bus_sr5650[0] = (sysconf.pci1234[0] >> 16) & 0xff;
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bus_sr5650[0] = (sysconf.pci1234[0] >> 16) & 0xff;
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bus_sp5100[0] = bus_sr5650[0];
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pirq_router_bus = bus_sr5650[0];
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/* sp5100 */
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dev = dev_find_slot(bus_sp5100[0], PCI_DEVFN(0x14, 4));
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if (dev) {
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bus_sp5100[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
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}
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/* sr5650 */
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/* sr5650 */
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for (i = 1; i < ARRAY_SIZE(bus_sr5650); i++) {
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for (i = 1; i < ARRAY_SIZE(bus_sr5650); i++) {
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@ -40,7 +40,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
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pirq_info->rfu = rfu;
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pirq_info->rfu = rfu;
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}
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}
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extern u8 bus_sp5100[2];
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unsigned long write_pirq_routing_table(unsigned long addr)
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unsigned long write_pirq_routing_table(unsigned long addr)
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{
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{
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@ -65,7 +64,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
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pirq->signature = PIRQ_SIGNATURE;
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pirq->signature = PIRQ_SIGNATURE;
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pirq->version = PIRQ_VERSION;
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pirq->version = PIRQ_VERSION;
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pirq->rtr_bus = bus_sp5100[0];
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pirq->rtr_bus = pirq_router_bus;
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pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
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pirq->rtr_devfn = PCI_DEVFN(0x14, 4);
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pirq->exclusive_irqs = 0;
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pirq->exclusive_irqs = 0;
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@ -81,7 +80,7 @@ unsigned long write_pirq_routing_table(unsigned long addr)
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slot_num = 0;
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slot_num = 0;
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/* pci bridge */
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/* pci bridge */
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write_pirq_info(pirq_info, bus_sp5100[0],
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write_pirq_info(pirq_info, pirq_router_bus,
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PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2,
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PCI_DEVFN(0x14, 4), 0x1, 0xdef8, 0x2,
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0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
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0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, 0);
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pirq_info++;
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pirq_info++;
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@ -21,7 +21,6 @@
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#include <cpu/amd/amdfam10_sysconf.h>
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#include <cpu/amd/amdfam10_sysconf.h>
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extern u8 bus_sr5650[14];
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extern u8 bus_sr5650[14];
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extern u8 bus_sp5100[2];
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extern u32 apicid_sp5100;
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extern u32 apicid_sp5100;
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@ -49,7 +48,7 @@ static void *smp_write_config_table(void *v)
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u32 *dword;
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u32 *dword;
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u8 byte;
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u8 byte;
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dev = dev_find_slot(0, //bus_sp5100[0], TODO: why bus_sp5100[0] use same value of bus_sr5650[0] assigned by get_pci1234(), instead of 0.
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dev = dev_find_slot(0, //pirq_router_bus TODO: why bus_sp5100[0] use same value of bus_sr5650[0] assigned by get_pci1234(), instead of 0.
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PCI_DEVFN(0x14, 0));
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PCI_DEVFN(0x14, 0));
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if (dev) {
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if (dev) {
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dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
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dword = (u32 *)(pci_read_config32(dev, 0x74) & 0xfffffff0);
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