From b31b033ccc50a2f5c609f5fd2cbfda588994b518 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 31 May 2021 14:41:15 +0300 Subject: [PATCH] cpu/x86/lapic: Drop xapic_write_atomic() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove code, which was only needed for B and C2 stepping of P54C. The linux kernel source has commentary on X86_BUG_11AP: * See if we have a good local APIC by checking for buggy Pentia, * i.e. all B steppings and the C2 stepping of P54C when using their * integrated APIC (see 11AP erratum in "Pentium Processor * Specification Update") Change-Id: Iec10335f603674bcef2e7494831cf11200795d38 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/55199 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/cpu/x86/lapic/lapic_cpu_init.c | 2 +- src/include/cpu/x86/lapic.h | 17 +++-------------- 2 files changed, 4 insertions(+), 15 deletions(-) diff --git a/src/cpu/x86/lapic/lapic_cpu_init.c b/src/cpu/x86/lapic/lapic_cpu_init.c index e141ad8ec9..bc0f44fd90 100644 --- a/src/cpu/x86/lapic/lapic_cpu_init.c +++ b/src/cpu/x86/lapic/lapic_cpu_init.c @@ -128,7 +128,7 @@ static int lapic_start_cpu(unsigned long apicid) printk(BIOS_ERR, "ESR is 0x%x\n", lapic_read(LAPIC_ESR)); if (lapic_read(LAPIC_ESR)) { printk(BIOS_ERR, "Try to reset ESR\n"); - xapic_write_atomic(LAPIC_ESR, 0); + lapic_write(LAPIC_ESR, 0); printk(BIOS_ERR, "ESR is 0x%x\n", lapic_read(LAPIC_ESR)); } diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 4fbae88ca5..05d096e318 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -18,21 +18,10 @@ static __always_inline void xapic_write(unsigned int reg, uint32_t v) write32((volatile void *)(uintptr_t)(LAPIC_DEFAULT_BASE + reg), v); } -static inline void xapic_write_atomic(unsigned long reg, uint32_t v) -{ - volatile uint32_t *ptr; - - ptr = (volatile uint32_t *)(LAPIC_DEFAULT_BASE + reg); - - asm volatile ("xchgl %0, %1\n" - : "+r" (v), "+m" (*(ptr)) - : : "memory", "cc"); -} - static __always_inline void xapic_send_ipi(uint32_t icrlow, uint32_t apicid) { - xapic_write_atomic(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid)); - xapic_write_atomic(LAPIC_ICR, icrlow); + xapic_write(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(apicid)); + xapic_write(LAPIC_ICR, icrlow); } static __always_inline int xapic_busy(void) @@ -114,7 +103,7 @@ static __always_inline void lapic_update32(unsigned int reg, uint32_t mask, uint value = xapic_read(reg); value &= mask; value |= or; - xapic_write_atomic(reg, value); + xapic_write(reg, value); } }