From b34576b03bc9034843969505d6193ea22837e36c Mon Sep 17 00:00:00 2001
From: Mario Scheithauer <mario.scheithauer@siemens.com>
Date: Tue, 27 Jun 2023 15:27:06 +0200
Subject: [PATCH] mb/siemens/mc_apl1: Rename macro 'TX_DWORD3' to
 'TX_DWORD3_P1'

The offset '0xa8c' for the High Speed I/O Transmit Control Register 3
refers to SATA port 1 only. To make this clear, change the name of the
define from 'TX_DWORD3' to 'TX_DWORD3_P1'.

Change-Id: I09d17eeffbe84939297e739586f6b74ed3e2258b
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76174
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Jan Samek <jan.samek@siemens.com>
---
 src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
index c9d4b29563..b7b997b5cc 100644
--- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
+++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/mainboard.c
@@ -11,7 +11,7 @@
 #include <baseboard/variants.h>
 #include <types.h>
 
-#define TX_DWORD3	0xa8c
+#define TX_DWORD3_P1	0xa8c
 
 void variant_mainboard_final(void)
 {
@@ -41,11 +41,11 @@ void variant_mainboard_final(void)
 
 	/*
 	 * Correct the SATA transmit signal via the High Speed I/O Transmit
-	 * Control Register 3.
+	 * Control Register 3 on SATA port 1.
 	 * Bit [23:16] set the output voltage swing for TX line.
 	 * The value 0x4a sets the swing level to 0.58 V.
 	 */
-	pcr_rmw32(PID_MODPHY, TX_DWORD3, (0x00 << 16), (0x4a << 16));
+	pcr_rmw32(PID_MODPHY, TX_DWORD3_P1, (0x00 << 16), (0x4a << 16));
 }
 
 static void finalize_boot(void *unused)