soc/intel/tigerlake: Add CNVi Bluetooth flag at devicetree entry

FSP has added the Cnvi BT Core enabling in addition to the existing
CnviMode. This change adds the flag at the soc config side (i.e.
soc_intel_tigerlake_config for devicetree). Also, there is no longer PCI host
interface for BT. Therefore, BT core should not use the pci port status to turn
on/off.

TEST: BT enumeration is checked using 'lsusb -d 8087:0026' from OS to make
        sure BT is turned on.

Change-Id: I71c512fe884060e23ee26e7334c575c4c517b78d
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50897
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Cliff Huang 2021-02-04 15:37:24 -08:00 committed by Patrick Georgi
parent ce97bca09c
commit b34be4d4bb
2 changed files with 9 additions and 8 deletions

View File

@ -316,6 +316,9 @@ struct soc_intel_tigerlake_config {
DEBUG_INTERFACE_TRACEHUB = (1 << 5), DEBUG_INTERFACE_TRACEHUB = (1 << 5),
} debug_interface_flag; } debug_interface_flag;
/* CNVi BT Core Enable/Disable */
bool CnviBtCore;
/* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */ /* CNVi BT Audio Offload: Enable/Disable BT Audio Offload. */
bool CnviBtAudioOffload; bool CnviBtAudioOffload;

View File

@ -106,8 +106,7 @@ static int get_disable_mask(struct soc_intel_tigerlake_config *config)
disable_mask |= LPM_S0i3_3 | LPM_S0i3_4 | LPM_S0i2_2; disable_mask |= LPM_S0i3_3 | LPM_S0i3_4 | LPM_S0i2_2;
/* If CNVi or ISH is used, S0i3.2/S0i3.3/S0i3.4 cannot be achieved. */ /* If CNVi or ISH is used, S0i3.2/S0i3.3/S0i3.4 cannot be achieved. */
if (is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_CNVI_BT)) || if (is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI)) ||
is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI)) ||
is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_ISH))) is_dev_enabled(pcidev_path_on_root(PCH_DEVFN_ISH)))
disable_mask |= LPM_S0i3_2 | LPM_S0i3_3 | LPM_S0i3_4; disable_mask |= LPM_S0i3_2 | LPM_S0i3_3 | LPM_S0i3_4;
@ -353,13 +352,12 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* CNVi */ /* CNVi */
dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI);
params->CnviMode = is_dev_enabled(dev); params->CnviMode = is_dev_enabled(dev);
params->CnviBtCore = config->CnviBtCore;
/* CNVi BT Core */
dev = pcidev_path_on_root(PCH_DEVFN_CNVI_BT);
params->CnviBtCore = is_dev_enabled(dev);
/* CNVi BT Audio Offload */
params->CnviBtAudioOffload = config->CnviBtAudioOffload; params->CnviBtAudioOffload = config->CnviBtAudioOffload;
/* Assert if CNVi BT is enabled without CNVi being enabled. */
assert(params->CnviMode || !params->CnviBtCore);
/* Assert if CNVi BT offload is enabled without CNVi BT being enabled. */
assert(params->CnviBtCore || !params->CnviBtAudioOffload);
/* VMD */ /* VMD */
dev = pcidev_path_on_root(SA_DEVFN_VMD); dev = pcidev_path_on_root(SA_DEVFN_VMD);