soc/intel/cannonlake: Remove redundent CNL CPUID macros
This patch ensures all CannonLake CPUIDs are part of mp_init.h hence remove duplicate macro definitions from SoC code. TEST=Build and boot CannonLake RVP Change-Id: Ibb6a22d5c708248bb53522f906cffb462142b7bf Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/23159 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
parent
567b4ee0b9
commit
b3585b9b35
|
@ -2,7 +2,7 @@
|
|||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2014 Google Inc.
|
||||
* Copyright (C) 2015 Intel Corporation.
|
||||
* Copyright (C) 2015-2018 Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@ -20,8 +20,8 @@
|
|||
#include <cpu/x86/msr.h>
|
||||
#include <device/pci.h>
|
||||
#include <device/pci_ids.h>
|
||||
#include <intelblocks/mp_init.h>
|
||||
#include <soc/bootblock.h>
|
||||
#include <soc/cpu.h>
|
||||
#include <soc/pch.h>
|
||||
#include <soc/pci_devs.h>
|
||||
#include <string.h>
|
||||
|
|
|
@ -2,7 +2,7 @@
|
|||
* This file is part of the coreboot project.
|
||||
*
|
||||
* Copyright (C) 2014 Google Inc.
|
||||
* Copyright (C) 2017 Intel Corporation.
|
||||
* Copyright (C) 2017-2018 Intel Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@ -21,12 +21,6 @@
|
|||
#include <device/device.h>
|
||||
#include <intelblocks/msr.h>
|
||||
|
||||
/* Supported CPUIDs */
|
||||
#define CPUID_CANNONLAKE_A0 0x60660
|
||||
#define CPUID_CANNONLAKE_B0 0x60661
|
||||
#define CPUID_CANNONLAKE_C0 0x60662
|
||||
#define CPUID_CANNONLAKE_D0 0x60663
|
||||
|
||||
/* Latency times in units of 1024ns. */
|
||||
#define C_STATE_LATENCY_CONTROL_0_LIMIT 0x4e
|
||||
#define C_STATE_LATENCY_CONTROL_1_LIMIT 0x76
|
||||
|
|
Loading…
Reference in New Issue