mainboard/google/poppy/variants/rammus: Fixed touchscreen function failed
According to issue tracker b:119238959 #4 & #6. Hardware modify design to make GPP_E3 to be a switch of touchscreen I2C CLK and SDA. Control GPP_E3 to make touchscreen I2C CLK and SDA keep low during power on initialization to avoid data transfer during this time. After touchscreen IC initial complete, control GPP_E3 to high to make touchscreen I2C CLK and SDA work normally. Depending on touchscreen IC specification, device take 105ms for power on initialization. Change delay time from 120ms to 105ms. BUG=b:119238959 BRANCH=firmware-rammus-11275.B TEST=emerge-rammus coreboot chromeos-ec chromeos-bootimage Flash FW to DUT, run S5 stress test and verify the result Signed-off-by: YanRu Chen <kane_chen@pegatron.corp-partner.google.com> Change-Id: I86452c1445243c499aeaf931dba286db169c5628 Reviewed-on: https://review.coreboot.org/c/30180 Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -264,7 +264,9 @@ chip soc/intel/skylake
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register "generic.irq" = "ACPI_IRQ_LEVEL_LOW(GPP_E7_IRQ)"
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register "generic.probed" = "1"
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register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_C22)"
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register "generic.enable_delay_ms" = "120"
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register "generic.enable_delay_ms" = "105"
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register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E3)"
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register "generic.stop_off_delay_ms" = "1"
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register "generic.has_power_resource" = "1"
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register "generic.disable_gpio_export_in_crs" = "1"
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register "hid_desc_reg_offset" = "0x0"
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@ -215,8 +215,8 @@ static const struct pad_config gpio_table[] = {
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PAD_CFG_NC(GPP_E1),
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/* E2 : SATAXPCIE2 ==> NC */
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PAD_CFG_NC(GPP_E2),
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/* E3 : CPU_GP0 ==> NC */
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PAD_CFG_NC(GPP_E3),
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/* E3 : CPU_GP0 ==> TOUCHSCREEN I2C OPERATION ENABLE/DISABLE. */
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PAD_CFG_GPO(GPP_E3, 0, DEEP),
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/* E4 : SATA_DEVSLP0 ==> NC */
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PAD_CFG_NC(GPP_E4),
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/* E5 : SATA_DEVSLP1 ==> NC */
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