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soc/intel/common/acpi: correct indentation 

Test: built google/volteer with `abuild --timeless` - SHA1 hashes match
Change-Id: Ice6cef402dfcc33f1fc7fdced66d38c380d338e5
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46467
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Michael Niewöhner 2020-10-15 17:32:10 +02:00 committed by Patrick Georgi
parent e5397bd116
commit b37d4b95d3
1 changed files with 69 additions and 69 deletions
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138
src/soc/intel/common/acpi/lpit.asl
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@ -24,80 +24,80 @@ Scope(\_SB)
Method(_DSM, 4)
{
If(Arg0 == ^UUID) {
/*
* Enum functions
*/
If(Arg2 == LPID_DSM_ARG2_ENUM_FUNCTIONS) {
Return(Buffer(One) {0x60})
}
/*
* Function 1 - Get Device Constraints
*/
If(Arg2 == LPID_DSM_ARG2_GET_DEVICE_CONSTRAINTS) {
Return(Package(5) {0, Ones, Ones, Ones, Ones})
}
/*
* Function 2 - Get Crash Dump Device
*/
If(Arg2 == LPID_DSM_ARG2_GET_CRASH_DUMP_DEV) {
Return(Buffer(One) {0x0})
}
/*
* Function 3 - Display Off Notification
*/
If(Arg2 == LPID_DSM_ARG2_DISPLAY_OFF_NOTIFY) {
}
/*
* Function 4 - Display On Notification
*/
If(Arg2 == LPID_DSM_ARG2_DISPLAY_ON_NOTIFY) {
}
/*
* Function 5 - Low Power S0 Entry Notification
*/
If(Arg2 == LPID_DSM_ARG2_S0IX_ENTRY) {
/* Inform the EC */
If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
\_SB.PCI0.LPCB.EC0.S0IX(1)
}
/* provide board level S0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(1)
}
/*
* Save the current PM bits then
* enable GPIO PM with MISCCFG_ENABLE_GPIO_PM_CONFIG
* Enum functions
*/
If (CondRefOf (\_SB.PCI0.EGPM))
{
\_SB.PCI0.EGPM ()
If(Arg2 == LPID_DSM_ARG2_ENUM_FUNCTIONS) {
Return(Buffer(One) {0x60})
}
/*
* Function 1 - Get Device Constraints
*/
If(Arg2 == LPID_DSM_ARG2_GET_DEVICE_CONSTRAINTS) {
Return(Package(5) {0, Ones, Ones, Ones, Ones})
}
/*
* Function 2 - Get Crash Dump Device
*/
If(Arg2 == LPID_DSM_ARG2_GET_CRASH_DUMP_DEV) {
Return(Buffer(One) {0x0})
}
/*
* Function 3 - Display Off Notification
*/
If(Arg2 == LPID_DSM_ARG2_DISPLAY_OFF_NOTIFY) {
}
/*
* Function 4 - Display On Notification
*/
If(Arg2 == LPID_DSM_ARG2_DISPLAY_ON_NOTIFY) {
}
/*
* Function 5 - Low Power S0 Entry Notification
*/
If(Arg2 == LPID_DSM_ARG2_S0IX_ENTRY) {
/* Inform the EC */
If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
\_SB.PCI0.LPCB.EC0.S0IX(1)
}
/* provide board level S0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(1)
}
/*
* Save the current PM bits then
* enable GPIO PM with MISCCFG_ENABLE_GPIO_PM_CONFIG
*/
If (CondRefOf (\_SB.PCI0.EGPM))
{
\_SB.PCI0.EGPM ()
}
}
/*
* Function 6 - Low Power S0 Exit Notification
*/
If(Arg2 == LPID_DSM_ARG2_S0IX_EXIT) {
/* Inform the EC */
If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
\_SB.PCI0.LPCB.EC0.S0IX(0)
}
/* provide board level S0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(0)
}
/* Restore GPIO all Community PM */
If (CondRefOf (\_SB.PCI0.RGPM))
{
\_SB.PCI0.RGPM ()
}
}
}
/*
* Function 6 - Low Power S0 Exit Notification
*/
If(Arg2 == LPID_DSM_ARG2_S0IX_EXIT) {
/* Inform the EC */
If (CondRefOf (\_SB.PCI0.LPCB.EC0.S0IX)) {
\_SB.PCI0.LPCB.EC0.S0IX(0)
}
/* provide board level S0ix hook */
If (CondRefOf (\_SB.MS0X)) {
\_SB.MS0X(0)
}
/* Restore GPIO all Community PM */
If (CondRefOf (\_SB.PCI0.RGPM))
{
\_SB.PCI0.RGPM ()
}
}
}
Return(Buffer(One) {0x00})
Return(Buffer(One) {0x00})
} // Method(_DSM)
} // Device (LPID)
} // End Scope(\_SB)