starting point for 87366

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/superio/NSC/pc87366/Config.lb

@@ -0,0 +1,2 @@
+config chip.h
+object superio.o

src/superio/NSC/pc87366/chip.h

@@ -0,0 +1,16 @@
+#ifndef SIO_COM1
+#define SIO_COM1_BASE   0x3F8
+#endif
+#ifndef SIO_COM2
+#define SIO_COM2_BASE   0x2F8
+#endif
+
+extern struct chip_control superio_NSC_pc87366_control;
+
+#include <pc80/keyboard.h>
+#include <uart8250.h>
+
+struct superio_NSC_pc87366_config {
+	struct uart8250 com1, com2;
+	struct pc_keyboard keyboard;
+};

src/superio/NSC/pc87366/pc87366.h

@@ -0,0 +1,11 @@
+#define PC87366_FDC  0x00 /* Floppy */
+#define PC87366_PP   0x01 /* Parallel port */
+#define PC87366_SP2  0x02 /* Com2 */
+#define PC87366_SP1  0x03 /* Com1 */
+#define PC87366_SWC  0x04
+#define PC87366_KBCM 0x05 /* Mouse */
+#define PC87366_KBCK 0x06 /* Keyboard */
+#define PC87366_GPIO 0x07
+#define PC87366_ACB  0x08
+#define PC87366_FSCM 0x09
+#define PC87366_WDT  0x0A

src/superio/NSC/pc87366/pc87366_early_serial.c

@@ -0,0 +1,11 @@
+#include <arch/romcc_io.h>
+#include "pc87366.h"
+
+
+static void pc87366_enable_serial(device_t dev, unsigned iobase)
+{
+	pnp_set_logical_device(dev);
+	pnp_set_enable(dev, 0);
+	pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
+	pnp_set_enable(dev, 1);
+}

src/superio/NSC/pc87366/superio.c

@@ -0,0 +1,77 @@
+/* Copyright 2000  AG Electronics Ltd. */
+/* Copyright 2003-2004 Linux Networx */
+/* This code is distributed without warranty under the GPL v2 (see COPYING) */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <device/chip.h>
+#include <console/console.h>
+#include <string.h>
+#include <bitops.h>
+#include <uart8250.h>
+#include <pc80/keyboard.h>
+#include "chip.h"
+#include "pc87366.h"
+
+static void init(device_t dev)
+{
+	struct superio_NSC_pc87366_config *conf;
+	struct resource *res0, *res1;
+	/* Wishlist handle well known programming interfaces more
+	 * generically.
+	 */
+	if (!dev->enable) {
+		return;
+	}
+	conf = dev->chip->chip_info;
+	switch(dev->path.u.pnp.device) {
+	case PC87366_SP1: 
+		res0 = get_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com1);
+		break;
+	case PC87366_SP2:
+		res0 = get_resource(dev, PNP_IDX_IO0);
+		init_uart8250(res0->base, &conf->com2);
+		break;
+	case PC87366_KBCK:
+		res0 = get_resource(dev, PNP_IDX_IO0);
+		res1 = get_resource(dev, PNP_IDX_IO1);
+		init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_enable,
+	.init             = init,
+};
+
+static struct pnp_info pnp_dev_info[] = {
+ { &ops, PC87366_FDC,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07fa, 0}, },
+ { &ops, PC87366_PP,   PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x04f8, 0}, },
+ { &ops, PC87366_SP2,  PNP_IO0 | PNP_IRQ0 | PNP_DRQ0 | PNP_DRQ1, { 0x7f8, 0 }, },
+ { &ops, PC87366_SP1,  PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
+ { &ops, PC87366_SWC,  PNP_IO0 | PNP_IRQ0, { 0xfff0, 0 }, },
+ { &ops, PC87366_KBCM, PNP_IRQ0 },
+ { &ops, PC87366_KBCK, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7f8, 0 }, { 0x7f8, 0x4}, },
+ { &ops, PC87366_GPIO, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87366_ACB,  PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87366_FSCM, PNP_IO0 | PNP_IRQ0, { 0xfff8, 0 } },
+ { &ops, PC87366_WDT,  PNP_IO0 | PNP_IRQ0, { 0xfffc, 0 } },
+};
+
+
+static void enumerate(struct chip *chip)
+{
+	pnp_enumerate(chip, sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), 
+		&pnp_ops, pnp_dev_info);
+}
+
+struct chip_control superio_NSC_pc87366_control = {
+	.enumerate = enumerate,
+	.name      = "NSC 87366"
+};