From b3e9aaf62b5608781bf59e282ec220cb4424d152 Mon Sep 17 00:00:00 2001 From: Eric Lai Date: Wed, 28 Oct 2020 11:46:02 +0800 Subject: [PATCH] mb/google/octopus/var/fleex: Disable XHCI LFPS power management by sku LTE module Fibocom L850-GL is lost after idle overnight, with this workaround, host will not initiate U3 wakeup at the same time with device, which will avoid the race condition. If this option is set in the devicetree, the bits[7:4] in XHCI MMIO BAR + offset 0x80A4 (PMCTRL_REG) will be updated from default 9 to 0. BUG=b:169645448 BRANCH=octopus TEST=build coreboot with DisableXhciLfpsPM being set to 1 and flash the image to the device. Run following command to check if bits[7:4] is set 0: >iotools mmio_read32 "XHCI MMIO BAR + 0x80A4" Signed-off-by: Eric Lai Change-Id: I3a04320b0e2441dce540a5afdc461f12de45c41b Reviewed-on: https://review.coreboot.org/c/coreboot/+/46868 Tested-by: build bot (Jenkins) Reviewed-by: Marco Chen --- .../google/octopus/variants/fleex/overridetree.cb | 7 ++++--- src/mainboard/google/octopus/variants/fleex/variant.c | 11 +++++++++++ 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb index 679b101037..2fd554ff88 100644 --- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb +++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb @@ -84,6 +84,10 @@ chip soc/intel/apollolake }, }" + # Disable compliance mode + register "DisableComplianceMode" = "1" + register "disable_xhci_lfps_pm" = "0" + device domain 0 on device pci 16.0 on chip drivers/i2c/hid @@ -181,7 +185,4 @@ chip soc/intel/apollolake end end # - I2C 7 end - - # Disable compliance mode - register "DisableComplianceMode" = "1" end diff --git a/src/mainboard/google/octopus/variants/fleex/variant.c b/src/mainboard/google/octopus/variants/fleex/variant.c index 522faa9d7b..5554fb3388 100644 --- a/src/mainboard/google/octopus/variants/fleex/variant.c +++ b/src/mainboard/google/octopus/variants/fleex/variant.c @@ -4,6 +4,7 @@ #include #include #include +#include #define MIN_LTE_SKU 4 @@ -31,3 +32,13 @@ const char *get_wifi_sar_cbfs_filename(void) return filename; } + +void variant_update_devtree(struct device *dev) +{ + struct soc_intel_apollolake_config *cfg = NULL; + + cfg = (struct soc_intel_apollolake_config *)dev->chip_info; + // Force disable_xhci_lfps_pm to update if it is LTE sku + if (cfg != NULL && is_lte_sku()) + cfg->disable_xhci_lfps_pm = 1; +}