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arm64: Uprev Arm TF and adjust to BL31 parameter changes 

This patch uprevs the Arm Trusted Firmware submodule to the new upstream
master (commit 42cdeb930).

Arm Trusted Firmware unified a bunch of stuff related to BL31 handoff
parameters across platforms which involved changing a few names around.
This patch syncs coreboot back up with that. They also made header
changes that now allow us to directly include all the headers we need
(in a safer and cleaner way than before), so we can get rid of some
structure definitions that were duplicated. Since the version of entry
point info parameters we have been using has been deprecated in Trusted
Firmware, this patch switches to the new version 2 parameter format.

NOTE: This may or may not stop Cavium from booting with the current
pinned Trusted Firmware blob. Cavium maintainers are still evaluating
whether to fix that later or drop the platform entirely.

Tested on GOOGLE_KEVIN (rk3399).

Change-Id: I0ed32bce5585ce191736f0ff2e5a94a9d2b2cc28
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34676
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
This commit is contained in:
Julius Werner 2019-05-28 21:01:37 -07:00
parent 8b93689a35
commit b3f24b4884
14 changed files with 101 additions and 256 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
3rdparty/arm-trusted-firmware vendored

@ -1 +1 @@
Subproject commit 693e278e308441d716f7f5116c43aa150955da31 Subproject commit 42cdeb93080f2b54a75be14e4f5ee776872f3f0f

89
src/arch/arm64/bl31.c
View File

@ -18,32 +18,75 @@
#include <bl31.h> #include <bl31.h>
#include <bootmem.h> #include <bootmem.h>
#include <cbfs.h> #include <cbfs.h>
#include <cbmem.h>
#include <console/console.h> #include <console/console.h>
#include <program_loading.h> #include <program_loading.h>
/* #include <arm-trusted-firmware/include/export/common/bl_common_exp.h>
* TODO: Many of these structures are currently unused. Better not fill them out
* to make future changes fail fast, rather than try to come up with content
* that might turn out to not make sense. Implement later as required.
*
static image_info_t bl31_image_info;
static image_info_t bl32_image_info;
static image_info_t bl33_image_info;
*/
static entry_point_info_t bl32_ep_info;
static entry_point_info_t bl33_ep_info;
static bl31_params_t bl31_params;
void __weak *soc_get_bl31_plat_params(bl31_params_t *params) static entry_point_info_t bl32_ep_info = {
.h = {
.type = PARAM_EP,
.version = PARAM_VERSION_1,
.size = sizeof(bl32_ep_info),
.attr = EP_SECURE,
},
};
static entry_point_info_t bl33_ep_info = {
.h = {
.type = PARAM_EP,
.version = PARAM_VERSION_1,
.size = sizeof(bl33_ep_info),
.attr = EP_NON_SECURE,
},
};
static bl_params_node_t bl32_params_node = {
.image_id = BL32_IMAGE_ID,
.ep_info = &bl32_ep_info,
};
static bl_params_node_t bl33_params_node = {
.image_id = BL33_IMAGE_ID,
.ep_info = &bl33_ep_info,
};
static bl_params_t bl_params = {
.h = {
.type = PARAM_BL_PARAMS,
.version = PARAM_VERSION_2,
.size = sizeof(bl_params),
.attr = 0,
},
.head = &bl33_params_node,
};
static struct bl_aux_param_header *bl_aux_params;
/* Only works when using the default soc_get_bl31_plat_params() below. */
void register_bl31_aux_param(struct bl_aux_param_header *param)
{ {
/* Default weak implementation. */ param->next = (uintptr_t)bl_aux_params;
return NULL; bl_aux_params = param;
}
/* Default implementation. All newly added SoCs should use this if possible! */
__weak void *soc_get_bl31_plat_params(void)
{
static struct bl_aux_param_uint64 cbtable_param = {
.h = { .type = BL_AUX_PARAM_COREBOOT_TABLE, },
};
if (!cbtable_param.value) {
cbtable_param.value = (uint64_t)cbmem_find(CBMEM_ID_CBTABLE);
if (cbtable_param.value)
register_bl31_aux_param(&cbtable_param.h);
}
return bl_aux_params;
} }
void run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr) void run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr)
{ {
struct prog bl31 = PROG_INIT(PROG_BL31, CONFIG_CBFS_PREFIX"/bl31"); struct prog bl31 = PROG_INIT(PROG_BL31, CONFIG_CBFS_PREFIX"/bl31");
void (*bl31_entry)(bl31_params_t *params, void *plat_params) = NULL; void (*bl31_entry)(bl_params_t *params, void *plat_params) = NULL;
if (prog_locate(&bl31)) if (prog_locate(&bl31))
die("BL31 not found"); die("BL31 not found");
@ -52,8 +95,6 @@ void run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr)
die("BL31 load failed"); die("BL31 load failed");
bl31_entry = prog_entry(&bl31); bl31_entry = prog_entry(&bl31);
SET_PARAM_HEAD(&bl31_params, PARAM_BL31, VERSION_1, 0);
if (CONFIG(ARM64_USE_SECURE_OS)) { if (CONFIG(ARM64_USE_SECURE_OS)) {
struct prog bl32 = PROG_INIT(PROG_BL32, struct prog bl32 = PROG_INIT(PROG_BL32,
CONFIG_CBFS_PREFIX"/secure_os"); CONFIG_CBFS_PREFIX"/secure_os");
@ -64,27 +105,21 @@ void run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr)
if (cbfs_prog_stage_load(&bl32)) if (cbfs_prog_stage_load(&bl32))
die("BL32 load failed"); die("BL32 load failed");
SET_PARAM_HEAD(&bl32_ep_info, PARAM_EP, VERSION_1,
PARAM_EP_SECURE);
bl32_ep_info.pc = (uintptr_t)prog_entry(&bl32); bl32_ep_info.pc = (uintptr_t)prog_entry(&bl32);
bl32_ep_info.spsr = SPSR_EXCEPTION_MASK | bl32_ep_info.spsr = SPSR_EXCEPTION_MASK |
get_eret_el(EL1, SPSR_USE_L); get_eret_el(EL1, SPSR_USE_L);
bl31_params.bl32_ep_info = &bl32_ep_info; bl33_params_node.next_params_info = &bl32_params_node;
} }
bl31_params.bl33_ep_info = &bl33_ep_info;
SET_PARAM_HEAD(&bl33_ep_info, PARAM_EP, VERSION_1, PARAM_EP_NON_SECURE);
bl33_ep_info.pc = payload_entry; bl33_ep_info.pc = payload_entry;
bl33_ep_info.spsr = payload_spsr; bl33_ep_info.spsr = payload_spsr;
bl33_ep_info.args.arg0 = payload_arg0; bl33_ep_info.args.arg0 = payload_arg0;
/* May update bl31_params if necessary. */ void *bl31_plat_params = soc_get_bl31_plat_params();
void *bl31_plat_params = soc_get_bl31_plat_params(&bl31_params);
/* MMU disable will flush cache, so passed params land in memory. */ /* MMU disable will flush cache, so passed params land in memory. */
raw_write_daif(SPSR_EXCEPTION_MASK); raw_write_daif(SPSR_EXCEPTION_MASK);
mmu_disable(); mmu_disable();
bl31_entry(&bl31_params, bl31_plat_params); bl31_entry(&bl_params, bl31_plat_params);
die("BL31 returned!"); die("BL31 returned!");
} }

109
src/arch/arm64/include/arm_tf_temp.h
View File

@ -1,109 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* Neither the name of ARM nor the names of its contributors may be used
* to endorse or promote products derived from this software without specific
* prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef __ARM_TF_TEMP_H__
#define __ARM_TF_TEMP_H__
#include <types.h>
/*
* Code temporarily copied from arm-trusted-firmware/include/common/bl_common.h,
* since it tries to pull in a few too many standard C headers and needs to be
* cleaned up a bit before we can include it directly.
*/
#define PARAM_EP_SECURE 0x0
#define PARAM_EP_NON_SECURE 0x1
#define PARAM_EP_SECURITY_MASK 0x1
#define PARAM_EP_EE_MASK 0x2
#define PARAM_EP_EE_LITTLE 0x0
#define PARAM_EP_EE_BIG 0x2
#define PARAM_EP_ST_MASK 0x4
#define PARAM_EP_ST_DISABLE 0x0
#define PARAM_EP_ST_ENABLE 0x4
#define PARAM_EP 0x01
#define PARAM_IMAGE_BINARY 0x02
#define PARAM_BL31 0x03
#define VERSION_1 0x01
#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
(_p)->h.type = (uint8_t)(_type); \
(_p)->h.version = (uint8_t)(_ver); \
(_p)->h.size = (uint16_t)sizeof(*_p); \
(_p)->h.attr = (uint32_t)(_attr) ; \
} while (0)
typedef struct aapcs64_params {
unsigned long arg0;
unsigned long arg1;
unsigned long arg2;
unsigned long arg3;
unsigned long arg4;
unsigned long arg5;
unsigned long arg6;
unsigned long arg7;
} aapcs64_params_t;
typedef struct param_header {
uint8_t type; /* type of the structure */
uint8_t version; /* version of this structure */
uint16_t size; /* size of this structure in bytes */
uint32_t attr; /* attributes: unused bits SBZ */
} param_header_t;
typedef struct entry_point_info {
param_header_t h;
uintptr_t pc;
uint32_t spsr;
aapcs64_params_t args;
} entry_point_info_t;
typedef struct image_info {
param_header_t h;
uintptr_t image_base; /* physical address of base of image */
uint32_t image_size; /* bytes read from image file */
} image_info_t;
typedef struct bl31_params {
param_header_t h;
image_info_t *bl31_image_info;
entry_point_info_t *bl32_ep_info;
image_info_t *bl32_image_info;
entry_point_info_t *bl33_ep_info;
image_info_t *bl33_image_info;
} bl31_params_t;
#endif /* __ARM_TF_TEMP_H__ */

12
src/arch/arm64/include/bl31.h
View File

@ -16,13 +16,17 @@
#include <types.h> #include <types.h>
/* TODO: Pull in directly from ARM TF once its headers have been reorganized. */ #include <arm-trusted-firmware/include/export/lib/bl_aux_params/bl_aux_params_exp.h>
#include <arm_tf_temp.h>
/* Load and enter BL31, set it up to exit to payload according to arguments. */ /* Load and enter BL31, set it up to exit to payload according to arguments. */
void run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr); void run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr);
/* Return platform-specific bl31_plat_params. May update bl31_params. */ /* Return platform-specific bl31_plat_params. SoCs should avoid overriding this
void *soc_get_bl31_plat_params(bl31_params_t *bl31_params); and stick with the default BL aux parameter framework if possible. */
void *soc_get_bl31_plat_params(void);
/* Add a BL aux parameter to the list to be passed to BL31. Only works for SoCs
that use the default soc_get_bl31_plat_params() implementation. */
void register_bl31_aux_param(struct bl_aux_param_header *param);
#endif /* __BL31_H__ */ #endif /* __BL31_H__ */

46
src/mainboard/google/gru/mainboard.c
View File

@ -15,6 +15,7 @@
*/ */
#include <assert.h> #include <assert.h>
#include <bl31.h>
#include <boardid.h> #include <boardid.h>
#include <console/console.h> #include <console/console.h>
#include <device/mmio.h> #include <device/mmio.h>
@ -23,7 +24,6 @@
#include <device/i2c_simple.h> #include <device/i2c_simple.h>
#include <ec/google/chromeec/ec.h> #include <ec/google/chromeec/ec.h>
#include <gpio.h> #include <gpio.h>
#include <soc/bl31_plat_params.h>
#include <soc/clock.h> #include <soc/clock.h>
#include <soc/display.h> #include <soc/display.h>
#include <soc/grf.h> #include <soc/grf.h>
@ -35,6 +35,8 @@
#include "board.h" #include "board.h"
#include <arm-trusted-firmware/include/export/plat/rockchip/common/plat_params_exp.h>
/* /*
* We have to drive the stronger pull-up within 1 second of powering up the * We have to drive the stronger pull-up within 1 second of powering up the
* touchpad to prevent its firmware from falling into recovery. Not on * touchpad to prevent its firmware from falling into recovery. Not on
@ -71,9 +73,9 @@ static void configure_emmc(void)
static void register_apio_suspend(void) static void register_apio_suspend(void)
{ {
static struct bl31_apio_param param_apio = { static struct bl_aux_param_rk_apio param_apio = {
.h = { .h = {
.type = PARAM_SUSPEND_APIO, .type = BL_AUX_PARAM_RK_SUSPEND_APIO,
}, },
.apio = { .apio = {
.apio1 = 1, .apio1 = 1,
@ -83,7 +85,7 @@ static void register_apio_suspend(void)
.apio5 = 1, .apio5 = 1,
}, },
}; };
register_bl31_param(&param_apio.h); register_bl31_aux_param(&param_apio.h);
} }
static void register_gpio_suspend(void) static void register_gpio_suspend(void)
@ -98,34 +100,34 @@ static void register_gpio_suspend(void)
* so we skip them. * so we skip them.
*/ */
if (!CONFIG(GRU_BASEBOARD_SCARLET)) { if (!CONFIG(GRU_BASEBOARD_SCARLET)) {
static struct bl31_gpio_param param_p15_en = { static struct bl_aux_param_gpio param_p15_en = {
.h = { .type = PARAM_SUSPEND_GPIO }, .h = { .type = BL_AUX_PARAM_RK_SUSPEND_GPIO },
.gpio = { .polarity = BL31_GPIO_LEVEL_LOW }, .gpio = { .polarity = ARM_TF_GPIO_LEVEL_LOW },
}; };
param_p15_en.gpio.index = GPIO_P15V_EN.raw; param_p15_en.gpio.index = GPIO_P15V_EN.raw;
register_bl31_param(&param_p15_en.h); register_bl31_aux_param(&param_p15_en.h);
static struct bl31_gpio_param param_p18_audio_en = { static struct bl_aux_param_gpio param_p18_audio_en = {
.h = { .type = PARAM_SUSPEND_GPIO }, .h = { .type = BL_AUX_PARAM_RK_SUSPEND_GPIO },
.gpio = { .polarity = BL31_GPIO_LEVEL_LOW }, .gpio = { .polarity = ARM_TF_GPIO_LEVEL_LOW },
}; };
param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw; param_p18_audio_en.gpio.index = GPIO_P18V_AUDIO_PWREN.raw;
register_bl31_param(&param_p18_audio_en.h); register_bl31_aux_param(&param_p18_audio_en.h);
} }
static struct bl31_gpio_param param_p30_en = { static struct bl_aux_param_gpio param_p30_en = {
.h = { .type = PARAM_SUSPEND_GPIO }, .h = { .type = BL_AUX_PARAM_RK_SUSPEND_GPIO },
.gpio = { .polarity = BL31_GPIO_LEVEL_LOW }, .gpio = { .polarity = ARM_TF_GPIO_LEVEL_LOW },
}; };
param_p30_en.gpio.index = GPIO_P30V_EN.raw; param_p30_en.gpio.index = GPIO_P30V_EN.raw;
register_bl31_param(&param_p30_en.h); register_bl31_aux_param(&param_p30_en.h);
} }
static void register_reset_to_bl31(void) static void register_reset_to_bl31(void)
{ {
static struct bl31_gpio_param param_reset = { static struct bl_aux_param_gpio param_reset = {
.h = { .h = {
.type = PARAM_RESET, .type = BL_AUX_PARAM_RK_RESET_GPIO,
}, },
.gpio = { .gpio = {
.polarity = 1, .polarity = 1,
@ -135,14 +137,14 @@ static void register_reset_to_bl31(void)
/* gru/kevin reset pin: gpio0b3 */ /* gru/kevin reset pin: gpio0b3 */
param_reset.gpio.index = GPIO_RESET.raw, param_reset.gpio.index = GPIO_RESET.raw,
register_bl31_param(&param_reset.h); register_bl31_aux_param(&param_reset.h);
} }
static void register_poweroff_to_bl31(void) static void register_poweroff_to_bl31(void)
{ {
static struct bl31_gpio_param param_poweroff = { static struct bl_aux_param_gpio param_poweroff = {
.h = { .h = {
.type = PARAM_POWEROFF, .type = BL_AUX_PARAM_RK_POWEROFF_GPIO,
}, },
.gpio = { .gpio = {
.polarity = 1, .polarity = 1,
@ -156,7 +158,7 @@ static void register_poweroff_to_bl31(void)
*/ */
param_poweroff.gpio.index = GPIO_POWEROFF.raw, param_poweroff.gpio.index = GPIO_POWEROFF.raw,
register_bl31_param(&param_poweroff.h); register_bl31_aux_param(&param_poweroff.h);
} }
static void configure_sdmmc(void) static void configure_sdmmc(void)

4
src/soc/cavium/cn81xx/bl31_plat_params.c
View File

@ -20,7 +20,7 @@
static struct bl31_plat_param *plat_params; static struct bl31_plat_param *plat_params;
void register_bl31_param(struct bl31_plat_param *param) void cn81xx_register_bl31_param(struct bl31_plat_param *param)
{ {
ASSERT(param); ASSERT(param);
@ -28,7 +28,7 @@ void register_bl31_param(struct bl31_plat_param *param)
plat_params = param; plat_params = param;
} }
void *soc_get_bl31_plat_params(bl31_params_t *bl31_params) void *soc_get_bl31_plat_params(void)
{ {
return plat_params; return plat_params;
} }

2
src/soc/cavium/cn81xx/include/soc/bl31_plat_params.h
View File

@ -19,6 +19,6 @@
#include <atf/plat_params.h> #include <atf/plat_params.h>
void register_bl31_param(struct bl31_plat_param *param); void cn81xx_register_bl31_param(struct bl31_plat_param *param);
#endif/* __BL31_PLAT_PARAMS_H__ */ #endif/* __BL31_PLAT_PARAMS_H__ */

4
src/soc/cavium/cn81xx/soc.c
View File

@ -354,7 +354,7 @@ static void soc_init_atf(void)
/* Point to devicetree in secure memory */ /* Point to devicetree in secure memory */
fdt_param.fdt_ptr = (uintptr_t)_sff8104; fdt_param.fdt_ptr = (uintptr_t)_sff8104;
register_bl31_param(&fdt_param.h); cn81xx_register_bl31_param(&fdt_param.h);
static struct bl31_u64_param cbtable_param = { static struct bl31_u64_param cbtable_param = {
.h = { .type = PARAM_COREBOOT_TABLE, }, .h = { .type = PARAM_COREBOOT_TABLE, },
@ -362,7 +362,7 @@ static void soc_init_atf(void)
/* Point to coreboot tables */ /* Point to coreboot tables */
cbtable_param.value = (uint64_t)cbmem_find(CBMEM_ID_CBTABLE); cbtable_param.value = (uint64_t)cbmem_find(CBMEM_ID_CBTABLE);
if (cbtable_param.value) if (cbtable_param.value)
register_bl31_param(&cbtable_param.h); cn81xx_register_bl31_param(&cbtable_param.h);
} }
static void soc_init(struct device *dev) static void soc_init(struct device *dev)

2
src/soc/mediatek/mt8173/Makefile.inc
View File

@ -85,8 +85,6 @@ ramstage-y += ../common/usb.c usb.c
ramstage-y += ../common/ddp.c ddp.c ramstage-y += ../common/ddp.c ddp.c
ramstage-y += ../common/dsi.c dsi.c ramstage-y += ../common/dsi.c dsi.c
ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += bl31_plat_params.c
BL31_MAKEARGS += PLAT=mt8173 BL31_MAKEARGS += PLAT=mt8173
################################################################################ ################################################################################

20
src/soc/mediatek/mt8173/bl31_plat_params.c
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@ -1,20 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2015 MediaTek Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <bl31.h>
void *soc_get_bl31_plat_params(bl31_params_t *bl31_params)
{
return NULL;
}

2
src/soc/nvidia/tegra210/arm_tf.c
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@ -32,7 +32,7 @@ typedef struct bl31_plat_params {
static bl31_plat_params_t t210_plat_params; static bl31_plat_params_t t210_plat_params;
void *soc_get_bl31_plat_params(bl31_params_t *params) void *soc_get_bl31_plat_params(void)
{ {
uintptr_t tz_base_mib; uintptr_t tz_base_mib;
size_t tz_size_mib; size_t tz_size_mib;

1
src/soc/rockchip/rk3399/Makefile.inc
View File

@ -76,7 +76,6 @@ ramstage-y += timer.c
ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/vop.c ramstage-$(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) += ../common/vop.c
ramstage-y += usb.c ramstage-y += usb.c
ramstage-y += bl31_plat_params.c
BL31_MAKEARGS += PLAT=rk3399 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)" BL31_MAKEARGS += PLAT=rk3399 M0_CROSS_COMPILE="$(CROSS_COMPILE_arm)"
################################################################################ ################################################################################

40
src/soc/rockchip/rk3399/bl31_plat_params.c
View File

@ -1,40 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2016 Rockchip Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#include <bl31.h>
#include <cbmem.h>
#include <soc/bl31_plat_params.h>
static struct bl31_plat_param *plat_params;
void register_bl31_param(struct bl31_plat_param *param)
{
param->next = plat_params;
plat_params = param;
}
void *soc_get_bl31_plat_params(bl31_params_t *bl31_params)
{
static struct bl31_u64_param cbtable_param = {
.h = { .type = PARAM_COREBOOT_TABLE, },
};
if (!cbtable_param.value) {
cbtable_param.value = (uint64_t)cbmem_find(CBMEM_ID_CBTABLE);
if (cbtable_param.value)
register_bl31_param(&cbtable_param.h);
}
return plat_params;
}

24
src/soc/rockchip/rk3399/include/soc/bl31_plat_params.h
View File

@ -1,24 +0,0 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2016 Rockchip Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef __BL31_PLAT_PARAMS_H__
#define __BL31_PLAT_PARAMS_H__
#include <arm-trusted-firmware/plat/rockchip/common/include/plat_params.h>
void register_bl31_param(struct bl31_plat_param *param);
#endif/* __BL31_PLAT_PARAMS_H__ */