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drop three unneeded config variables: 

- HAVE_HIGH_TABLES
- HAVE_LOW_TABLES
- FALLBACK_SIZE

Jens Rottmann sent an almost identical patch at the same time, so
Signed-off-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de>

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Jens Rottmann 2010-08-27 09:36:41 +00:00 committed by Stefan Reinauer
parent 78265d5609
commit b3f8090f4e
25 changed files with 0 additions and 104 deletions
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4
documentation/Kconfig.tex
View File

@ -420,10 +420,6 @@ config NORTHBRIDGE_AMD_AMDK8
config AGP_APERTURE_SIZE
hex
default 0x4000000
config HAVE_HIGH_TABLES
int
default 1
\end{verbatim}
\subsubsection{northbridge/$<$vendor$>$/$<$chip$>$/Makefile.inc}
Typically very small set of rules, and very simple.

26
src/Kconfig
View File

@ -250,27 +250,6 @@ config GFXUMA
#
# endmenu
#TODO Remove this option or make it useful.
config HAVE_LOW_TABLES
bool
default y
help
This Option is unused in the code. Since two boards try to set it to
'n', they may be broken. We either need to make the option useful or
get rid of it. The broken boards are:
asus/m2v-mx_se
supermicro/h8dme
config HAVE_HIGH_TABLES
bool
default y
help
This variable specifies whether a given northbridge has high table
support.
It is set in northbridge/*/Kconfig.
Whether or not the high tables are actually written by coreboot is
configurable by the user via WRITE_HIGH_TABLES.
config HAVE_ACPI_TABLES
bool
help
@ -310,15 +289,10 @@ config GENERATE_PIRQ_TABLE
bool
default HAVE_PIRQ_TABLE
config WRITE_HIGH_TABLES
bool
default HAVE_HIGH_TABLES
menu "System tables"
config WRITE_HIGH_TABLES
bool "Write 'high' tables to avoid being overwritten in F segment"
depends on HAVE_HIGH_TABLES
default y
config MULTIBOOT

5
src/mainboard/amd/dbm690t/Kconfig
View File

@ -24,11 +24,6 @@ config MAINBOARD_DIR
default amd/dbm690t
depends on BOARD_AMD_DBM690T
config HAVE_HIGH_TABLES
bool
default n
depends on BOARD_AMD_DBM690T
# This is a temporary fix, and should be removed when the race condition for
# building option_table.h is fixed.
config WARNINGS_ARE_ERRORS

5
src/mainboard/amd/mahogany/Kconfig
View File

@ -26,11 +26,6 @@ config MAINBOARD_DIR
default amd/mahogany
depends on BOARD_AMD_MAHOGANY
config HAVE_HIGH_TABLES
bool
default n
depends on BOARD_AMD_MAHOGANY
config DCACHE_RAM_BASE
hex
default 0xc8000

5
src/mainboard/asrock/939a785gmh/Kconfig
View File

@ -27,11 +27,6 @@ config MAINBOARD_DIR
default asrock/939a785gmh
depends on BOARD_ASROCK_939A785GMH
config HAVE_HIGH_TABLES
bool
default n
depends on BOARD_ASROCK_939A785GMH
config DCACHE_RAM_BASE
hex
default 0xc8000

1
src/northbridge/amd/amdfam10/Kconfig
View File

@ -21,7 +21,6 @@ config NORTHBRIDGE_AMD_AMDFAM10
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HAVE_HIGH_TABLES
select HYPERTRANSPORT_PLUGIN_SUPPORT
select NORTHBRIDGE_AMD_AMDFAM10_ROOT_COMPLEX

1
src/northbridge/amd/amdk8/Kconfig
View File

@ -21,7 +21,6 @@ config NORTHBRIDGE_AMD_AMDK8
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HAVE_HIGH_TABLES
select HYPERTRANSPORT_PLUGIN_SUPPORT
config AGP_APERTURE_SIZE

1
src/northbridge/amd/lx/Kconfig
View File

@ -1,6 +1,5 @@
config NORTHBRIDGE_AMD_LX
bool
select HAVE_HIGH_TABLES
select GEODE_VSA
config VIDEO_MB

1
src/northbridge/intel/e7501/Kconfig
View File

@ -1,5 +1,4 @@
config NORTHBRIDGE_INTEL_E7501
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_HIGH_TABLES

1
src/northbridge/intel/e7520/Kconfig
View File

@ -1,4 +1,3 @@
config NORTHBRIDGE_INTEL_E7520
bool
select HAVE_HIGH_TABLES

1
src/northbridge/intel/e7525/Kconfig
View File

@ -1,4 +1,3 @@
config NORTHBRIDGE_INTEL_E7525
bool
select HAVE_HIGH_TABLES

1
src/northbridge/intel/i3100/Kconfig
View File

@ -1,4 +1,3 @@
config NORTHBRIDGE_INTEL_I3100
bool
select HAVE_HIGH_TABLES

1
src/northbridge/intel/i440bx/Kconfig
View File

@ -20,7 +20,6 @@
config NORTHBRIDGE_INTEL_I440BX
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_HIGH_TABLES
config SDRAMPWR_4DIMM
bool

1
src/northbridge/intel/i440lx/Kconfig
View File

@ -19,5 +19,4 @@
config NORTHBRIDGE_INTEL_I440LX
bool
select HAVE_HIGH_TABLES

1
src/northbridge/intel/i82810/Kconfig
View File

@ -20,7 +20,6 @@
config NORTHBRIDGE_INTEL_I82810
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_HIGH_TABLES
choice
prompt "Onboard graphics"

1
src/northbridge/intel/i82830/Kconfig
View File

@ -1,7 +1,6 @@
config NORTHBRIDGE_INTEL_I82830
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_HIGH_TABLES
choice
prompt "Onboard graphics"

1
src/northbridge/intel/i855/Kconfig
View File

@ -1,4 +1,3 @@
config NORTHBRIDGE_INTEL_I855
bool
select HAVE_HIGH_TABLES

1
src/northbridge/intel/i945/Kconfig
View File

@ -20,7 +20,6 @@
config NORTHBRIDGE_INTEL_I945
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_HIGH_TABLES
config FALLBACK_VGA_BIOS_ID
string

5
src/northbridge/via/cn400/Kconfig
View File

@ -1,11 +1,6 @@
config NORTHBRIDGE_VIA_CN400
bool
config FALLBACK_SIZE
int
default 0
depends on NORTHBRIDGE_VIA_CN400
# TODO: Values are from the CX700 datasheet, not sure if this matches CN400.
# TODO: What should be the per-chipset default value here?
choice

22
src/northbridge/via/cn400/vga.c
View File

@ -83,23 +83,6 @@ static void vga_init(device_t dev)
mainboard_interrupt_handlers(0x15, &via_cn400_int15_handler);
#undef OLD_BOCHS_METHOD
#ifdef OLD_BOCHS_METHOD
u32 temp;
// XXX We might need more bios hooks in the f segment, but
// this way of copying the BOCHS BIOS does not work anymore.
// As soon as someone verifies that CN400 can init VGA, the
// code should be removed.
temp = (0xffffffff - CONFIG_FALLBACK_SIZE - 0xffff);
printk(BIOS_DEBUG, "Copying BOCHS BIOS from 0x%08X to 0xf000\n", temp);
/*
* Copy BOCHS BIOS from 4G-CONFIG_FALLBACK_SIZE-64k (in flash) to 0xf0000 (in RAM)
* This is for compatibility with the VGA ROM's BIOS callbacks.
*/
//memcpy(0xf0000, (0xffffffff - CONFIG_ROM_SIZE - 0xffff), 0x10000);
memcpy((void *)0xf0000, (void *)temp, 0x10000);
#endif
/* Set memory rate to 200 MHz. */
outb(0x3d, CRTM_INDEX);
reg8 = inb(CRTM_DATA);
@ -138,11 +121,6 @@ static void vga_init(device_t dev)
outb(0x39, SR_INDEX);
outb(reg8, SR_DATA);
#ifdef OLD_BOCHS_METHOD
/* Clear the BOCHS BIOS out of memory, so it doesn't confuse Linux. */
memset((void *)0xf0000, 0, 0x10000);
#endif
#ifdef DEBUG_CN400
int i, j;

1
src/northbridge/via/cn700/Kconfig
View File

@ -1,7 +1,6 @@
config NORTHBRIDGE_VIA_CN700
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_HIGH_TABLES
config FALLBACK_SIZE
int

1
src/northbridge/via/cx700/Kconfig
View File

@ -2,7 +2,6 @@ config NORTHBRIDGE_VIA_CX700
bool
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
select HAVE_HIGH_TABLES
select HAVE_HARD_RESET
select IOAPIC
select SMP

6
src/northbridge/via/vt8601/Kconfig
View File

@ -1,9 +1,3 @@
config NORTHBRIDGE_VIA_VT8601
bool
select HAVE_HIGH_TABLES
config FALLBACK_SIZE
int
default 0
depends on NORTHBRIDGE_VIA_VT8601

6
src/northbridge/via/vt8623/Kconfig
View File

@ -1,9 +1,3 @@
config NORTHBRIDGE_VIA_VT8623
bool
select HAVE_HIGH_TABLES
config FALLBACK_SIZE
int
default 0
depends on NORTHBRIDGE_VIA_VT8623

5
src/northbridge/via/vx800/Kconfig
View File

@ -3,8 +3,3 @@ config NORTHBRIDGE_VIA_VX800
select HAVE_DEBUG_RAM_SETUP
select HAVE_DEBUG_SMBUS
config FALLBACK_SIZE
int
default 0
depends on NORTHBRIDGE_VIA_VX800