include/device/pci_def.h: Fix typo in comment

Fix typo in the comment for Common Clock Configuration.

Change-Id: Idd01e787458a9090d53b9a57547b8158480dcc16
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73311
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
This commit is contained in:
Werner Zeh 2023-02-27 08:50:15 +01:00 committed by Elyes Haouas
parent 63c1f7b187
commit b40b2b1933
1 changed files with 1 additions and 1 deletions

View File

@ -431,7 +431,7 @@
#define PCI_EXP_LNKCAP_PORT 0xff000000 /* Port Number */ #define PCI_EXP_LNKCAP_PORT 0xff000000 /* Port Number */
#define PCI_EXP_LNKCTL 16 /* Link Control */ #define PCI_EXP_LNKCTL 16 /* Link Control */
#define PCI_EXP_LNKCTL_RL 0x20 /* Retrain Link */ #define PCI_EXP_LNKCTL_RL 0x20 /* Retrain Link */
#define PCI_EXP_LNKCTL_CCC 0x40 /* Common Clock COnfiguration */ #define PCI_EXP_LNKCTL_CCC 0x40 /* Common Clock Configuration */
#define PCI_EXP_EN_CLK_PM 0x100 /* Enable Clock Power Management */ #define PCI_EXP_EN_CLK_PM 0x100 /* Enable Clock Power Management */
#define PCI_EXP_LNKSTA 18 /* Link Status */ #define PCI_EXP_LNKSTA 18 /* Link Status */
#define PCI_EXP_LNKSTA_LT 0x800 /* Link Training */ #define PCI_EXP_LNKSTA_LT 0x800 /* Link Training */